Abstract: A boom deploy actuator with improved maintainability and simplicity has an electric motor and control circuitry for selectively powering the motor to develop torque with either rotational direction for rotating a capstan to vary the length of a boom cord extending from the capstan to a boom. In a preferred embodiment, the motor is a brushless electric motor. The control circuitry preferably includes circuit components for limiting the speed of the motor.

Abstract: A delay cell has selectable numbers of parallel load resistance transistors operable in parallel, and a similarly selectable number of bias current transistors connectable in parallel. The delay cell is preferably differential in construction and operation. A voltage controlled oscillator (“VCO”) includes a plurality of such delay cells connected in a closed loop series. Phase locked loop (“PLL”) circuitry includes such a VCO controlled by phase/frequency detector circuitry. The PLL can have a very wide range of operating frequencies as a result of the ability to control the number of load resistance transistors and bias current transistors that are active or inactive in each delay cell. Such activation/deactivation may be programmable or otherwise controlled.

Abstract: A high-speed, current-driven latch is provided. The latch conducts a current and includes an output, a SET circuit and a RESET circuit. The output is variable between a first state and a second state. The SET circuit conducts the current present in the latch at the first state such that the SET circuit is maintained close to a level required to change the output of the transistor from the first to the second level, and the RESET circuit conducts the current at the second level such that the RESET circuit is close to a level required to change the output of the transistor from the second level to the first level.

Abstract: A mask-programmable logic device that includes programmable gate array sites is provided. The gate array sites contain circuit elements that may be programmed to perform certain logic functions that correct problems associated with implementing a preexisting circuit design in mask-programmable device.

Abstract: Integrated circuit devices are provided that include power detection circuits that indicate whether power supplies have reached functional voltage levels. The power detection circuits include latches coupled to power supplies that can detect whether all the power supplies have reached functional voltage levels, logic circuits to provide appropriate output signals, and well bias circuits that supply current to the power detection circuits. Well bias circuits provide current from first power supplies to reach functional voltage levels so that indication may be provided from the power detection circuit without requiring functional voltage levels of all power supplies. Outputs from power detection circuits can be combined with control signals, for various applications. Applications include holding an integrated circuit device in reset until power supplies have reached functional voltage levels.

Abstract: A winder and system for winding wire onto core supports of dynamo-electric cores with translational, rotational and radial motions with respect to a central longitudinal axis of the dynamo-electric core is provided. The radial motion may preferably be provided by an independent assembly. In one embodiment of the invention, the radial motion may be provided by rotating a cam disk which is movably connected to, and causes radial motion of, a pair of rollers. The pair of rollers are mounted on support arms which are connected to a needle for dispensing the wire such that movement of the pair causes similar movement of the needle. In another embodiment of the invention, an inclined way is coupled to a slide portion of the needle. When the inclined way is moved parallel to the axis, it causes a radial motion of the slide portion.

Abstract: Systems and methods for promoting ischemic preconditioning in individuals are provided. Ischemic preconditioning is provided by exercise treatments. The exercise treatments consist of breathing exercise regimens with breathing sequences of oxygenating and non-oxygenating phases co-ordinated with stress-relaxation cycles. The breathing sequences are designed to induce periods of ischemia. The individualized exercise treatments can induce optimal number of periods of ischemia separated by suitable intervals to provide effective ischemic preconditioning.

Abstract: Instrumentation for facilitating cutting an opening in a side wall of a body conduit in a patient. A tubular structure defines a lumen and has a sharpened distal end portion configured to cut a section of the body conduit to create the opening. A tissue holding structure is provided which is axially movable within the lumen of the tubular structure. The tissue holding structure includes a piercing portion to permit passage of the tissue holding structure through the body conduit from an entrance side to an exit side thereof. The tissue holding structure also includes a retention member to secure the section of the body conduit to the tissue holding structure during movement of the tissue holding structure to approximate the entrance side of the body conduit with the sharpened distal portion of the tubular structure to enable the sharpened distal structure to cut the body conduit. A connector is also provided for attaching a new length of tubing to the body conduit at the opening made by the cutting.

Abstract: Driver circuitry for programmable logic devices may include a module comprising a driver and associated hardware-programmable input and/or output routing connections. Instances of the generalized driver module may be included anywhere on the programmable logic device that driver circuitry having characteristics within the capabilities of the generalized module is needed. The circuitry of each instance of the module is hardware-customized to match the driver characteristics required for that instance. Driver circuits may be distributed throughout the interconnection conductor resources of the programmable logic device in such a way as to optimize re-buffering of signals propagating through those resources.

Abstract: Multiple phase switching regulators with stage shedding are provided. Multiple phase switching regulators of the present invention have a plurality of single phase switching regulators coupled in parallel to an output capacitor. The plurality of single phase switching regulators supply current to a load at a regulated voltage. A comparator monitors the load current and causes one or more of the single phase switching regulators to be OFF at a low load current threshold. At least one of the single phase switching regulators that remains ON increases its output current so that the multiple phase switching regulator output current continues to match the load current. The present invention may include a second comparator that causes additional single phase switching regulators to be OFF at a second low load current threshold that is lower than the first low load current threshold.

Abstract: Circuitry and methods are provided for reducing rise time associated with signals on an open-drain or open-collector signal line. Signal line voltage is monitored to determine if the signal line is being pulled LOW. If the signal line is not being pulled LOW, as indicated by signal line voltage exceeding a threshold level, additional pullup current is provided. The additional current may be provided gradually in relation to the signal line voltage, or may be provided in full whenever voltage exceeds the threshold. Circuitry may also be provided to monitor voltage slew rate on the signal line, and to enable the additional pullup current only when the slew rate exceeds a positive threshold level.

Abstract: A circuit that provides the root-mean-square (RMS) value of an input signal and that detects and independently recovers from an output fault condition is provided. The circuit includes reconfigurable circuitry that changes from normal operating mode to fault recovery mode when an output fault is detected. During fault recovery mode, the circuit provides a modified output signal that allows independent recovery from an output fault condition. Once recovery is complete, the circuit returns to normal operating mode and provides a DC output signal proportional to the RMS value of an AC input signal.

Abstract: A programmable logic integrated circuit device has at least one function-specific circuit block (e.g., a parallel multiplier, a parallel barrel shifter, a parallel arithmetic logic unit, etc.) in addition to the usual multiple regions of programmable logic and the usual programmable interconnection circuit resources. To reduce the impact of use of the function-specific block (“FSB”) on the general purpose interconnection resources of the device, inputs and/or outputs of the FSB may be coupled relatively directly to a subset of the logic regions. In addition to conserving general purpose interconnect, resources of the logic regions to which the FSB are connected can be used by the FSB to reduce the amount of circuitry that must be dedicated to the FSB.

Abstract: The present invention provides radio frequency (RF) power controllers that regulate the power output signal of an RF power amplifier using a control signal. The RF power controller includes a power control amplifier that measures the difference between a feedback signal and a power control input signal to supply the control signal to the RF power amplifier. The output power signal is amplitude modulated for a period of time during an enable mode. During the amplitude modulation period, the RF power controller opens the power control loop and maintains a substantially constant output voltage to the RF power amplifier using a second amplifier and a capacitor coupled to power control amplifier. The capacitor is decoupled from the power control amplifier during the amplitude modulation period, and the second amplifier supplies the output voltage of the RF power controller based upon the stored voltage on the capacitor.

Abstract: An improved interconnection switch using NMOS passgates is presented which allows the gate voltage of the NMOS passgate to be bootstrapped to a higher voltage than the initial voltage applied thereon so as to allow a higher logic HIGH signal to be passed. The stimulus for this bootstrapping is the transition of the logic signal at the input terminal of the NMOS passgate, which obviates the need for a separate external stimulus. Because the bootstrapping occurs as a result of the dynamic coupling between the gate terminal and the channel of the NMOS passgate, the voltage across the gate oxide does not exceed the magnitude of the logic HIGH signal, thereby rendering the use of thick-oxide devices unnecessary.

Abstract: A programmable logic device includes, in addition to the usual regions of programmable logic and the programmable interconnect, at least one region of memory which has multiple independently usable write and/or read ports (e.g., two write ports and two read ports). Every memory cell in the memory region is accessible from any of these ports. This enables the memory region to be used to provide either one relatively large memory or two somewhat smaller memories, each occupying a fraction of the full memory. In the latter case, the two memories provided can have any of many different sizes relative to one another. Many different modes or combinations of modes of operating the memory region or parts of the memory region are possible.

Abstract: Integrated circuit devices are provided that include power detection circuits that indicate whether power supplies have reached functional voltage levels. The power detection circuits include latches coupled to power supplies that can detect whether all the power supplies have reached functional voltage levels, logic circuits to provide appropriate output signals, and well bias circuits that supply current to the power detection circuits. Well bias circuits provide current from first power supplies to reach functional voltage levels so that indication may be provided from the power detection circuit without requiring functional voltage levels of all power supplies. Outputs from power detection circuits can be combined with control signals, for various applications. Applications include holding an integrated circuit device in reset until power supplies have reached functional voltage levels.

Abstract: A winder and system for winding wire onto core supports of dynamo-electric cores with translational, rotational and radial motions with respect to a central longitudinal axis of the dynamo-electric core is provided. The radial motion may preferably be provided by an independent assembly. In one embodiment of the invention, the radial motion may be provided by rotating a cam disk which is movably connected to, and causes radial motion of, a pair of rollers. The pair of rollers are mounted on support arms which are connected to a needle for dispensing the wire such that movement of the pair causes similar movement of The needle. In another embodiment of the invention, an inclined way is coupled to a slide portion of the needle. When the inclined way is moved parallel to the axis, it causes a radial motion of the slide portion.

Abstract: A programmable logic device is equipped for low voltage differential signaling (“LVDS”) by providing an LVDS input buffer and/or an LVDS output buffer on the device. I/O pins on the device that are used together in pairs for LVDS can alternatively be used individually for other types of signaling. The LVDS buffers are constructed to give good performance and to meet LVDS specifications despite variations due to temperature, manufacturing process inconsistency, and power supply changes.