Abstract: A method of testing a multi-core processor that includes the steps of receiving a plurality of input signals from a plurality of processor cores (100), and producing an output signal corresponding to a disable state when at least two of the plurality of input signals represent a different logic value (106). A testing device (12) includes a multiplexer (40) responsive to a plurality of input signals (24, 26, 28, 30) from a plurality of processor cores (14, 16, 18, 20), and an output driver (48) responsive to the multiplexer (40). The output driver (48) produces an output signal (62) corresponding to a disable state when at least two of the plurality of input signals (24, 26, 28, 30) represent a different logic value.

Abstract: A Single Instruction Multiple Data processor apparatus for implementing algorithms using sliding window type data is shown. The implementation shifts the elements of a Destination Vector Register (406, 606) either automatically every time the destination register value is read or in response to a specific instruction (800). The shifting of the Destination Vector Register (406, 606) allows each processing element to operate on new data. As the destination vector (406, 606) elements are shifted, a new element is provided to the vector from a Source Vector Register (404, 604).

Abstract: A network navigation method includes steps of reading machine-readable data (14) associated with an article of mail (12), and determining an electronic address (20) based upon the machine-readable data (14). A network navigation system is provided to perform the aforementioned steps.

Abstract: A foldable apparatus includes a first housing (20), a second housing (22), and an interface (24). The second housing (22) is pivotally connected to the first housing (20). The interface (24) has a first portion (26) associated with the first housing (20) and a second portion (28) associated with the second housing (22).

Abstract: A projection system for a computer has an electronic slide (94) that is coupled to an electronic image signal (84) from a processor (82) in the computer (50). Projection optics (102) focus an optical image from the electronic slide (94) onto a screen (58).

Abstract: An apparatus comprises a disk-shaped support member (20) supporting a first sample-processing device (28) and a second sample-processing device (30). The first sample-processing device (28) has an elongate portion oriented along a first radial axis (32) of the support member (20). The second sample-processing device (30) has an elongate portion oriented along a second radial axis (34) transverse to the first radial axis (32). A sample-processing device can comprise a plurality of conduits (150) interconnected in a tree topology to couple an inlet (152) with a plurality of outlets (154). The inlet (152) is located at a root vertex and each of the outlets (154) is located at a corresponding leaf vertex of the tree topology. Each of a plurality of molecular detection chambers (156) is coupled to a respective one of the outlets (154). A method of using the apparatus is disclosed.

Abstract: An apparatus for placing at least one biological reagent at a plurality of locations on a substrate includes a stamp member onto which the at least one biological reagent is applied. The stamp member defines a plurality of transfer elements patterned to correspond to the plurality of locations. The stamp member contacts the substrate to transfer the at least one biological reagent from the plurality of transfer elements to the plurality of locations. The transfer elements can be defined by reservoirs or projected portions of the stamp member.

Abstract: An arithmetic logic unit (30) for a digital signal processor (DSP) contains circuitry for preshifting (46, 48) and prerounding (54) the 2's-complement fractional input operands (32, 34) before they are used by a carry look-ahead adder (56). The preshifting (46, 48) provides for efficient divide-by-2 and divide-by-4 functionality and reduces early overflow. Concurrent preshifting (46, 48) and prerounding (54) improve the critical path timing in the carry look-ahead adder (56).

Abstract: Multiple memory arrays (215, 225) in embedded applications are each tightly coupled to their own Built-In Self-Test (BIST) controller to form BISTed memory cells (210, 220) supporting structural and retention testing. Testing on multiple BISTed memories (210, 220) is initiated by common INVOKE (230), RETENTION (240), and RELEASE (250) signals. DONE and HOLD signals are combined (260, 280) from the multiple BISTed memories (210, 220) and delayed to generate a global "all memory" DONE (265) and HOLD (285) signals. FAIL signals are combined (270) from the multiple BISTed memories (210, 220) to generate a global "any memory" FAIL (275) signal. The BISTed memories can be combined in multiple stages to meet power limitations.

Abstract: A method of interconnecting transistors and other devices in order to optimize area of a layout of a cell while honoring performance constraints (1502) and enhancing yield starts with a prerouting step (152) that routes adjacent transistors using diffusion wiring (1506), routes power and ground nets (1508), routes aligned gates (1510), routes all remaining aligned source/drain nets as well as any special nets (1512). Next, all of the remaining nets are routed using an area based router (1408). Nets are order based on time criticality or net topology (1602). A routing grid is assigned for all the layers to be used in routing (1604). An initial coarse routing is performed (1606). Wire groups are assigned to routing layers (1608). Routing is improved and vias are minimized (1610). A determination is then made whether the routing solution is acceptable (1612). If the routintg solution is not acceptable, the routing space is expanded and routing costs and via costs are modifyied to improve the routing solution.

Abstract: In accordance with a first aspect, a noninvasive apparatus comprises a card-shaped housing which supports the transdermal delivery device (10). In accordance with a second aspect, a retaining member (18) retains a removable member (16) proximate to at least a portion of the transdermal delivery device (10). In accordance with a third aspect, a transdermal delivery apparatus comprises a processor (24) to receive delivery data via an interface (28) and to direct a transdermal delivery device (10) based upon the delivery data.

Abstract: A molecular detection device including a support member (36) and a plurality of molecular receptors (34) arranged at a plurality of sites of the support member (36). In a first aspect, the molecular receptors (34) are arranged in accordance with a mapping selected from the group consisting of a random mapping and a pseudorandom mapping. In a second aspect, data associated with the mapping is written to a member associated with the support member (36). In a third aspect, the molecular receptors (34) includes a first plurality of molecular receptors germane to an application and at least one molecular receptor extraneous to the application.

Abstract: A method that includes the steps of producing a digital code (104) based at least in part on an integrated circuit capacitance and adjusting a frequency of the clocking signal in response to the digital code (106). A method that includes the steps of in a first mode of operation, producing a fixed frequency clocking signal, the fixed frequency clocking signal having a frequency tolerance less than 20 units per million and, in a second mode of operation, producing a variable frequency clocking signal, the variable frequency clocking signal having a frequency variability range greater than 200 units per million. An apparatus for providing a clocking signal includes a tuner circuit (12) and an oscillator circuit (16) responsive to the tuner circuit (12). The tuner circuit (12) is responsive to a clock signal source (38), an integrated circuit capacitance, and a reference resistor (18). The tuner circuit (12) produces a digital code signal.

Abstract: Data is allocated into multiple memories with selective variable replication for maximizing performance by minimizing concurrent memory access conflicts. Requirements for concurrent access are summarized in a transformed concurrent access graph. Graph vertices are merged to disallow variable replication. All potential graph merges that cause a reduction in machine cycle time are identified. The ratios of saved cycles/memory cost in bytes are then computed for each potential merge. The potential merges are then sorted by their saved cycles/bytes ratio. Finally, potential merges resulting in replicated variables are selected based on their cycles/bytes ratios until a predefined memory target size is achieved. Either graph coloring or clique partitioning can be used to allocate variables into memory banks.

Abstract: In accordance with a first aspect, a noninvasive apparatus comprises a housing (42) having a grasping region (44), and a noninvasive extraction device (10) to noninvasively extract a sample from a hand of an end user at the grasping region (44). In accordance with a second aspect, a noninvasive apparatus comprises a card-shaped housing which supports the noninvasive extraction device 10. In accordance with a third aspect, a retaining member (22) retains a removable biosensor (16) proximate to at least a portion of the noninvasive extraction device (10).

Abstract: A compiled cycle based circuit simulator efficiently implements dynamic loop resolution at execution time. A static loop arises when a plurality of signals appear to be interdependent. In a properly designed circuit, apparent looping of signals is usually protected by other mutually exclusive signals. A dynamic loop exists when the signals are actually interdependent. A cyclic clock is divided into a fixed plurality of time slots. During each time slot that a plurality of interrelated signals can change, code for the interdependent signals used by other logic or memory elements are demand generated as function calls. Within each such called function, computation of dependent interdependent signals is by function call protected by control signals. Nondynamic static looping of signals is thus efficiently ignored. Dynamic looping is detected and reported through monitoring of function call depth.

Abstract: A medical communication apparatus comprises a receiver (54) to receive a message and at least one output device (56) responsive to the receiver (54). The at least one output device (56) generates an alert for taking a first medicine and a second medicine in response to the message, and graphically indicates the first medicine and the second medicine.

Abstract: A data processor (10) flexibly interfaces with both a variety of memory devices and external peripheral devices. A control register (94) is provided for dynamically controlling an electrical interface configuration of the data processor. A set of bits (DA) in the control register (94) provides configuration control which indicates a pair of voltage level of data communicated with the data processor.

Abstract: A molecular detection apparatus comprises a molecular receptor (20), a detection element (22) responsive to the molecular receptor (20), and a substrate (24) which supports the detection element (22). The molecular detection apparatus further includes a grasping member (26) and an elongated member (30) to couple the grasping member (26) to the substrate (24).

Abstract: A method for determining a subscriber unit location in a communication system is provided. The method includes the steps of receiving a signal from the subscriber unit at a first base station, determining a first receive time of the signal based on a sequence of spreading symbols at the first base station, determining a first angle of arrival of the signal at the first base station, and determining the location of the subscriber unit from the first receive time, the first angle of arrival, and further predetermined information about the first base station. The signal is formed via modulation by the sequence of spreading symbols.