Patents Represented by Attorney Jerry W. Herndon
  • Patent number: 5258982
    Abstract: A method of reducing the number of messages required for sync point (commit or backout) operations by leaving out nodes that have not participated in the corresponding transaction. A two-phase sync point protocol is used in a distributed transaction processing network to commit or backout transactions in the network. In response to the beginning of sync point operations on a transaction x, each node determines if each of its partner nodes stated on the sync point operation for transaction x-1 that the partner could be left out of sync point operations for transaction x-1. If a partner node did so state that it could be left out, the present node determines if the partner node was included by the present node during the present transaction x. If the partner node was not included during the present transaction, the present node excludes the partner node from the present sync point operations.
    Type: Grant
    Filed: May 7, 1991
    Date of Patent: November 2, 1993
    Assignee: International Business Machines Corporation
    Inventors: Kathryn H. Britton, Andrew P. Citron, Chandrasekaran Mohan, George M. Samaras
  • Patent number: 5255387
    Abstract: Method and apparatus for shared data update and query operations. Two control fields are associated with each data block of interest. Before any data in shared memory is modified, a value different from the present value is written into one of the shared memory control fields. The shared memory data is then updated. Thereafter, the other shared memory control field is updated to the new value, thus making the values of the shared memory control fields identical once again. During query operations, the data and control fields of interest are copied into in private storage. The values of the control fields in private memory are compared. If the values are equal, the data in private storage is considered to be consistent. Otherwise, the data is considered to be in the process of being updated and the data is ignored until the values of the shared memory control fields become equal.
    Type: Grant
    Filed: April 27, 1990
    Date of Patent: October 19, 1993
    Assignee: International Business Machines Corporation
    Inventors: Michael E. Arnold, Graham P. Bate
  • Patent number: 5245608
    Abstract: A method and arrangement for providing a layered communications environment for the routing of information blocks between layers to layer entities forming a logical group based on information block type and the function provided by the individual entities of the group. When an access point (AP) between layers, is first activated, it is given a group classification. As other APs between the layers are activated, they too are given group classifications. All APs between the layers having the same group classification are considered to form a single logical grouping of APs. Each of these APs can be attached to different entities in the adjacent upper layer. This logical grouping allows for information block routing from a lower layer to the adjacent upper layer based on both logical group and block type. The entities in the upper layer that are within one logical group may include separate entities for control and management functions and separate entities for data transport purposes.
    Type: Grant
    Filed: September 26, 1990
    Date of Patent: September 14, 1993
    Assignee: International Business Machines Corporation
    Inventors: George A. Deaton, Jr., Vicki G. Horton, Yves J. Huchet, Jeffrey J. Lynch, Claude R. Pond, Ralph J. Potok, II, James H. Ragsdale, Arthur J. Stagg, Robert M. Teague, Charles E. Williford
  • Patent number: 5235597
    Abstract: A method and apparatus for allowing the higher layers of two nodes on a connection that uses an asynchronous link protocol to synchronize the exchange of messages so that, without knowledge of the lower data link protocols, the protocols at higher layers can complete when the data link protocols are also complete. The upper layer of a node sends messages for transmittal to another node to the lower layer of its node and receives messages from another node via the lower layer of its node. A first message, including an initiator flag is sent from the upper layer of the first node to the lower layer of the first node. In response, the lower layer transmits a second message including the initiator flag from the first message to the lower layer of the second node. The second message is transmitted as a command or a response in accordance with the send process state of the lower layer of the first node.
    Type: Grant
    Filed: March 8, 1991
    Date of Patent: August 10, 1993
    Assignee: International Business Machines Corp.
    Inventors: Harold A. Himwich, Joseph R. Mason, Thomas P. McSweeney, Robert A. Vrabel, Loretta S. Wolhar
  • Patent number: 5223827
    Abstract: A process and apparatus for detecting the occurrence of an event threshold and performing some type of action in response to the detection. The disclosed use of the invention is for managing communication connections in a network. An event counter, a sliding event threshold counter and a sliding interval counter are initialized to prescribed initial states at the start of counter management. At the expiration of an interval specified by the contents of the sliding interval counter, the sliding interval counter is incremented by an offset time value, and the sliding event threshold counter is updated by the sum of an offset event value and the event counter. The event counter is incremented on each occurrence of an event to be counted.
    Type: Grant
    Filed: May 23, 1991
    Date of Patent: June 29, 1993
    Assignee: International Business Machines Corporation
    Inventors: Rodney A. Bell, Edward G. Britton
  • Patent number: 5224205
    Abstract: A method and arrangement is disclosed for extending a resource search across a gateway node connecting a peer-to-peer network with a subarea network. An interface node is divided into a first section associated with the peer network and a second section associated with the subarea network. In response to a resource search request arriving at one of the sections from the network with which the section is associated, a directory of resources known by the respective section is first searched. If the resource is not found in the directory of the section, the search request is translated into a format compatible with the other network, and the translated search request is transmitted to the other section of the interface node. If the resource is not found among the resources known to the interface node, the resources known by the end nodes served by the interface node in the peer network are next searched.
    Type: Grant
    Filed: May 21, 1990
    Date of Patent: June 29, 1993
    Assignee: International Business Machines Corp.
    Inventors: Joel E. Dinkin, Johnathan L. Harter, Julie M. Henderson, Dirk K. Kramer, Michael A. Lerner, Haldon J. Sandick
  • Patent number: 5148479
    Abstract: An arrangement of authenticating communications network users and means for carrying out the arrangement. A first challenge N1 is transmitted from a first user A to a second user B. In response to the first challenge, B transmits a first response and second challenge N2 to A. A verifies the first response. A then generates and transmits a second response to the second challenge to B, where the second response is verified. The first response must be of a minimum formf(S1, N1, . . . ),and the second response must be of the minimum formg(S2, N2, . . . ).S1 and S2 are shared secrets between A and B. f() and g() are selected such that the equationf'(s1,N1', . . . )=g(S2, N2)cannot be solved for N1' without knowledge of S1 and S2. f'() and N1' represent expressions on a second reference connection. Preferably, the function f() may include the direction D1 of the flow of the message containing f(), as in f(s1, N1, D1, . . . ). In such a case, f() is selected such that the equationf'(S,N1',D1', . . . )=f(S, N2, D1, .
    Type: Grant
    Filed: March 20, 1991
    Date of Patent: September 15, 1992
    Assignee: International Business Machines Corp.
    Inventors: Raymond F. Bird, Inder S. Gopal, Philippe A. Janson, Shay Kutten, Refik A. Molva, Marcel M. Yung
  • Patent number: 5136710
    Abstract: An arrangement and method of inactivating dynamically an exit in a computer system. An exit is a program module associated with a first program and which is invoked while active by a second program in response to the occurrence of a prescribed system event. When a request to inactivate exit is received, it is determined if one or more invocations of the exit are in progress or scheduled. If an invocation of the exit is not in progress or scheduled, the exit is marked as inactive. However, if one or more invocations of the exit are in progress or scheduled, the exit is marked as inactive only when all such invocations that are in progress or scheduled are complete.
    Type: Grant
    Filed: June 21, 1990
    Date of Patent: August 4, 1992
    Assignee: International Business Machines Corporation
    Inventors: Michael E. Arnold, Graham P. Bate, Alan F. Brodnick, Joel M. Salzman, Timothy L. Spickler
  • Patent number: 5081572
    Abstract: In multi-user (including multi-process) computing systems, Memory Access Serialization instructions are used to allow multiple processes to add and remove elements from a list without the usual software serialization requirements.
    Type: Grant
    Filed: October 28, 1988
    Date of Patent: January 14, 1992
    Inventor: Michael E. Arnold
  • Patent number: 5077730
    Abstract: A method and apparatus of releasing resources allocated to terminated sessions at a secondary data processing node. A first node transmits one or more switch messages to a second node requesting the second node to redistribute sessions on a first route between the nodes among one or more alternate routes. Each switch message identifies the sessions to be switched and an alternate route to which the sessions are to be switched. The last switch message transmitted by the first node is indicated to be the last message in some appropriate way and includes a count of the total number of sessions that have been requested to be switched. The second node accumulates a count of the total number of sessions on the first route for which it has received a switch request. The second node compares its accumulated count with the total count derived from the last switch message and releases the resources allocated to all remaining sessions on the first route in the event the counts are equal.
    Type: Grant
    Filed: August 2, 1990
    Date of Patent: December 31, 1991
    Inventors: Andrew H. Arrowood, Kaiwah Chan, Owen H. Choi, John G. Dudley, Diane A. Schuster
  • Patent number: 5024497
    Abstract: An optical fiber switch in which a switchable fiber is switched to a first position by a first member inside the housing made of a shape memory material. This first member attempts to restore itself to an original shape heated above a first temperature and, in so doing, exerts a switching force on the switchable fiber. In a preferred embodiment, biasing means push the switchable fiber into a second position when the first means is below a second temperature. The first member exerts a force on the switchable fiber in a direction opposite to that of the biasing means of sufficient force to overcome the biasing force when the first member is above the first temperature. When the shape memory member is cooled, it assumes a distorted shape which allows the biasing means to control the position of the switchable fiber. In one embodiment, the biasing means is a second member also made of a shape memory material.
    Type: Grant
    Filed: February 15, 1989
    Date of Patent: June 18, 1991
    Assignee: AT&T Bell Laboratories
    Inventor: Robert W. Jebens
  • Patent number: 5001480
    Abstract: A conversion system is disclosed for performing either an analog-to-digital A/D conversion associated with an amplification step or a digital-to-analog D/A conversion associated with an attenuation step. The system includes apparatus (115) for receiving a input digital word to be processed, i.e. converted into analog and then attenuated, and apparatus (165) for receiving a input analog value to be processed, i.e. amplified for scaling purposes and then converted into digital. It also includes a digital-to-analog D/A converter (110), an attenuator (120) for attenuating the analog output of D/A converter (110), and a comparator (150) for comparing the value of the input analog value to be processed and the output of said attenuator (120). The processing of the D/A-attenuation process is performed by both the D/A converter (110) and attenuator (120).
    Type: Grant
    Filed: October 17, 1988
    Date of Patent: March 19, 1991
    Assignee: International Business Machines Corp.
    Inventors: Michel Ferry, Christian Jacquart
  • Patent number: 4984272
    Abstract: A method for administering secure access to files of a computer system. For a process-file pair, a first security label associated with the process is compared with a second security label associated with the file in response to a request to read or write the file. If the security label of the destination (file or process) of the read or write operation does not dominate the security label of the source (file or process), the security label of the destination is dynamically raised accordingly. If the security label of the file or process is raised, an indicator associated with this process and with this file is set to a first state representing that the file is safe for this process-file pair. Indicators associated with every other process linked with this file are set to a second state representing that the file is unsafe for those process-file pairs.
    Type: Grant
    Filed: November 30, 1988
    Date of Patent: January 8, 1991
    Assignee: AT&T Bell Laboratories
    Inventors: M. Douglas McIlroy, James A. Reeds
  • Patent number: 4972345
    Abstract: An error detection apparatus is implemented in a passive device inserted on a synchronous bus, linking two devices. The bus has data lines onto which data are transferred between the two devices under control of tag lines and clock signals which are companion of the transferred data. The apparatus allows errors to be detected, the failing device to be identified and the error signals to be reported in a psuedo-synchronous way on an error bus due to error detection and reporting logic circuits and a pseudo-synchronous timing circuit.
    Type: Grant
    Filed: January 9, 1989
    Date of Patent: November 20, 1990
    Assignee: International Business Machines Corp.
    Inventors: Jean-Marie Munier, Michael Peyronnenc, Michel Poret
  • Patent number: 4938552
    Abstract: An electrostatic optical fiber switch. An aperture in the switch housing allows for switching movement of the end of a fiber. This aperture is formed in part by a groove in which the depth and width of the groove increases continuously with distance toward the end of the fiber. This forms a smoothly curving surface for restraining and aligning the switching end of the fiber when the electrostatic field is applied. This arrangement substantially reduces the voltage required to operate the switch by prior electrostatic switches.
    Type: Grant
    Filed: February 15, 1989
    Date of Patent: July 3, 1990
    Assignee: AT&T Bell Laboratories
    Inventors: Robert W. Jebens, William S. N. Trimmer, James A. Walker
  • Patent number: 4896937
    Abstract: A precisely aligned optical fiber switch assembly. A base member has a vee groove for supporting a fixed optical fiber and a second optical fiber in optical alignment with the fixed fiber. The groove contains sections of different dimensions that receive and align sheathed portions of the fibers and groove sections that receive and align unsheathed portions of the fibers. First aligning means on the base member longitudinally position the fixed and second fibers in the groove. Covering means mate with the base member for covering at least part of the sheathed portions of the fibers. Aligning means position the covering means precisely with respect to the base member.
    Type: Grant
    Filed: August 2, 1988
    Date of Patent: January 30, 1990
    Assignee: American Telephone and Telegraph Company, AT&T Bell Laboratories
    Inventors: Richard T. Kraetsch, Richard J. Pimpinella, Leonard W. Schaper, King L. Tai
  • Patent number: 4894620
    Abstract: A switched capacitor circuit with a very large time constant. Numerous low frequency analog applications, modems for example, require this type of circuit. The capacitances required to obtain a sufficiently large time constant are reduced over prior art techniques by as much as 50%. The circuit is insensitive to parasitic capacitances. The circuit comprises a switched input sampling capacitor, an operational amplifier and a first feedback capacitor connected in parallel with the amplifier. The switched sampling capacitor samples an input signal in a first clock phase. A second feedback capacitor is switched during the first phase to sample the output of the operational amplifier; and, in a second phase, it is switched in parallel with the first feedback capacitor of the amplifier.
    Type: Grant
    Filed: April 11, 1988
    Date of Patent: January 16, 1990
    Assignee: AT&T Bell Laboratories
    Inventor: Krishnaswamy Nagaraj
  • Patent number: 4864824
    Abstract: An actuator including a device made of thin film shape memory material mounted to a substrate. The thin film device is deformed from its original shape. Thereafter, the device is heated to restore the device to its original shape. Motion of the device occurs in the deforming and restoring steps, which is used to produce some form of work result.
    Type: Grant
    Filed: October 31, 1988
    Date of Patent: September 12, 1989
    Assignee: American Telephone and Telegraph Company, AT&T Bell Laboratories
    Inventors: Kaigham J. Gabriel, Mehran Mehregany, James A. Walker
  • Patent number: 4853889
    Abstract: Arrangement and method for avoiding the processing time associated with executing branch instructions in a computer. An instruction fetch unit appends a next instruction address field to each instruction it passes it via an instruction cache to an instruction execution unit. The fetch unit decodes the present instruction being read and the next sequential instruction in main memory. If neither instruction is a branch instruction, the next address field is set to the address of the next sequential instruction. If the present instruction is a branch, the next instruction address field is set to the branch address contained in the present instruction. If neither of these cases are true and the next sequential instruction from main memory is a branch, the next instruction address field is set to the branch address of this instruction. The execution unit uses the next instruction address to access instructions from the instruction cache. Thus, execution of branch instructions by the execution unit are avoided.
    Type: Grant
    Filed: May 11, 1987
    Date of Patent: August 1, 1989
    Assignee: American Telephone and Telegraph Company, AT&T Bell Laboratories
    Inventors: David R. Ditzel, Hubert R. McLellan, Jr.
  • Patent number: D303111
    Type: Grant
    Filed: November 18, 1985
    Date of Patent: August 29, 1989
    Assignee: American Telephone and Telegraph Company, AT&T Bell Laboratories
    Inventor: Steven J. Paley