Abstract: A method of fabricating a mask ROM is provided, gate dielectric and a plurality of first conductive strips are sequentially formed over a substrate. A first dielectric layer is formed over the substrate and the first conductive strips. The first dielectric layer is patterned to form a plurality of first coding openings. Each first coding opening exposes the first conductive layer. A plurality of first wells is formed in the first conductive layer at the bottom of the first coding openings. A plurality of second conductive strips is formed over the first dielectric layer and inside the first coding openings to connect electrically with corresponding first wells and form a diode memory cell array. Additional diode memory cell arrays may stack over the diode memory cell array to increase device integration.
Type:
Grant
Filed:
February 24, 2003
Date of Patent:
September 21, 2004
Assignee:
Macronix International Co., Ltd.
Inventors:
Shang-Ping Lin, Tsung-Yi Chou, Chun-Yi Yang, Hsiang-Pang Lee