Patents Represented by Attorney Jianq Chyun JP Office
  • Patent number: 7425736
    Abstract: A silicon layer with high resistance is provided. The silicon layer with high resistance is positioned on a substrate. Also, the silicon layer with high resistance includes a plurality of silicon material layers, and an interface layer between every two of the silicon material layers, wherein, the silicon material layers and the interface layer have dopants therein. The amount of implanted dopants is about 1*1014˜5*1015 ions/cm2, and the silicon material layers have different grain boundaries.
    Type: Grant
    Filed: June 7, 2005
    Date of Patent: September 16, 2008
    Assignee: United Microelectronics Corp.
    Inventor: Yu-Chi Yang