Patents Represented by Attorney Jim Comfort
  • Patent number: 4987462
    Abstract: Preferred embodiments include a microwave power MISFET (30) with a thin GaAS channel (54) bounded by an undoped Al.sub.x Ga.sub.1-x As gate insulator (44) and a doped Al.sub.y Ga.sub.1-y As barrier (40). Under forward bias the channel (54) forms a quantum well which accumulates electrons and thereby increase maximum current and power handling without degrading breakdown voltage of the heterostructure MISFET An additional active layer (36) can be included on the other side of the barrier (40) to further increase power handling. Other embodiments include use of a strained layer In.sub.z Ga.sub.1-z As channel.
    Type: Grant
    Filed: January 6, 1987
    Date of Patent: January 22, 1991
    Assignee: Texas Instruments Incorporated
    Inventors: Bumman Kim, Hua Q. Tserng
  • Patent number: 4985865
    Abstract: Asymmetrical delay circuitry comprising a chain of inverters connected to logic gates is disclosed which can be implemented at the word line driver or in the address decode circuitry of a memory.
    Type: Grant
    Filed: December 21, 1988
    Date of Patent: January 15, 1991
    Assignee: Texas Instruments Incorporated
    Inventor: Theodore W. Houston
  • Patent number: 4978634
    Abstract: The described embodiments of the present invention provide DRAM cells, structures and manufaturing methods. In a first embodiment, a DRAM cell with a trench capacitor having a first plate formed as a diffusion on the outside surface of a trench formed in the substrate and a second plate having a conductive region formed inside the trench is fabricated. The transfer transistor is formed using a field plate isolation structure which includes a self-aligned moat area for the transfer transistor. The moat area slightly overlaps the capacitor area and allows for increased misalignment tolerance thus foregoing the requirement for misalignment tolerances built into the layout of the DRAM cell. The field plate itself is etched so that it has sloped sidewalls to avoid the formation of conductive filaments from subsequent conductive layers formed on the integrated circuit.
    Type: Grant
    Filed: July 25, 1989
    Date of Patent: December 18, 1990
    Assignee: Texas Instruments, Incorporated
    Inventors: Bing-Whey Shen, Masaaki Yashiro, Randy McKee, Gishi Chung, Kiyoshi Shirai, Clarence Teng, Donald J. Coleman, Jr.
  • Patent number: 4656732
    Abstract: Integrated circuits wherein the width of contacts is narrowed by a sidewall oxide, so that the metal layer can be patterned to minimum geometry everywhere, and does not have to be widened where it runs over a contact.
    Type: Grant
    Filed: September 26, 1984
    Date of Patent: April 14, 1987
    Assignee: Texas Instruments Incorporated
    Inventors: Clarence W. Teng, Roger A. Haken
  • Patent number: 4579600
    Abstract: Polysilicon resistors and integrated circuits are brought to zero or positive temperature coefficient (TCR) by a combination of laser annealing and ionic hydrogen plasma treatment.
    Type: Grant
    Filed: June 17, 1983
    Date of Patent: April 1, 1986
    Assignee: Texas Instruments Incorporated
    Inventors: Rajiv Shah, Samuel L. Hughey
  • Patent number: 4528666
    Abstract: A memory apparatus including an array of storage elements connected to several addressing lines for selectively connecting a group of the storage elements to multiple data lines. The memory apparatus further includes a parity circuit connected to the data lines and storage elements for selectively generating parity to designate the validity of the selected group of data connected in the portion of storage elements selected by the address lines and storing the parity in the array with the data. Control circuitry is further included for controlling the generation of parity by the parity circuit. The parity generation in this memory system is programmable according to control lines that are connected to the control circuit. The parity circuit may generate the parity output either in the same cycle as the memory access or in the next succeeding cycle of memory access. The output buffer for the parity signal may also be programmable in either a push-pull or a pull-down only configuration.
    Type: Grant
    Filed: January 3, 1983
    Date of Patent: July 9, 1985
    Assignee: Texas Instruments Incorporated
    Inventors: James H. Cline, David M. Chastain
  • Patent number: 4468625
    Abstract: Circuit detecting synchronization pulses in a composite signal constituted by synchronization pulses alternating with digital and/or analog signals. The composite signal is applied to first and second detectors. The first detector detects and stores the peak value of the synchronization pulses. The second detector follows and stores the peak value of the composite signal in the same direction as the synchronization pulses, and in particular the base of the synchronization pulse. A comparator receives at its two inputs the stored values and the comparator output assumes a first state when the difference between the stored values is below a predetermined value and a second state when the difference between the stored values is above the predetermined value. The comparator output is shaped and used to trigger a one shot multivibrator to produce narrow pulses of a predetermined duration, free of front and back porch noise, in synchronism with the synchronization pulses in the composite signal.
    Type: Grant
    Filed: October 26, 1981
    Date of Patent: August 28, 1984
    Assignee: Texas Instruments Incorporated
    Inventors: Pascal R. Tandart, Jean L. Villevielle
  • Patent number: 4462959
    Abstract: Controllable doping of HgCdTe in concentrations low enough to be useful for electronic devices is accomplished by dissolving the desired dopant in mercury at or below the solubility limit. The mercury is then diluted with pure mercury, to lower the dopant concentration to that which will produce the desired impurity concentration in the end product. The doped mercury is then compounded according to conventional methods, to produce reproducibly doped HgCdTe of uniform composition.
    Type: Grant
    Filed: April 5, 1982
    Date of Patent: July 31, 1984
    Assignee: Texas Instruments
    Inventor: John H. Tregilgas
  • Patent number: 4335391
    Abstract: The invention is embodied in a non-volatile metal-insulator-semiconductor having a novel combination of insulating layers including a titanium dioxide layer covered by a silicon dioxide layer. In one embodiment of the invention the insulator combination also includes a second layer of silicon dioxide located between the titanium dioxide and the semiconductor. In another embodiment the insulator combination also includes a layer of silicon nitride located between the titanium dioxide layer and the semiconductor. The memory elements are fabricated using a novel sequence of steps for forming multiple dielectric layers. The titanium dioxide of a type known as rutile is formed by evaporation of titanium metal upon the silicon dioxide and oxidation of the titanium in an oxygen ambient at high temperatures. Writing is accomplished by injection of charge into the titanium dioxide layer thus shifting the threshold voltage of the structure.
    Type: Grant
    Filed: December 11, 1978
    Date of Patent: June 15, 1982
    Assignee: Texas Instruments Incorporated
    Inventor: Henry B. Morris
  • Patent number: 4331708
    Abstract: A method of fabricating deep grooves having submicron widths in a semiconductor substrate. A pattern of submicron oxidation masking elements formed on the substrate surface serves as an oxidation mask for a thick oxide layer. After forming the oxide layer, the insulating elements are removed to form a pattern of submicron width openings in the oxide extending to the substrate. A selective anisotropic dry etch is then used to form deep, narrow grooves in the substrate conforming to the pattern of openings which are filled with an insulating material formed by thermal oxidation, chemical vapor deposition, or a combination thereof. This process is used to provide deep dielectric isolation between active areas in high density integrated circuits.
    Type: Grant
    Filed: November 4, 1980
    Date of Patent: May 25, 1982
    Assignee: Texas Instruments Incorporated
    Inventor: William R. Hunter
  • Patent number: 4266234
    Abstract: A parallel readout stratified channel CCD includes a plurality of parallel spaced apart charge transfer channels lying in a semiconductor substrate. A barrier region lies under and adjacent to all the charge transfer channels and their separating regions. A charge integration channel lies under and adjacent to the barrier region. The substrate and barrier region have dopant of atoms of a first type; while a charge integration channel has dopant of atoms of a second type opposite to the first type. An insulating layer overlies the charge transfer channel, and a plurality of phase electrodes are serially disposed thereon transversely to all of the charge transfer channels. Further included are interchannel transfer regions under selected portions of predetermined ones of the electrodes. These enable localized interchannel charge transfer.
    Type: Grant
    Filed: January 16, 1978
    Date of Patent: May 5, 1981
    Assignee: Texas Instruments Incorporated
    Inventors: Larry J. Hornbeck, Harold H. Hosack
  • Patent number: 4159487
    Abstract: An automatic TV tuner circuit responsive to a tuning voltage for tuning over a desired frequency reception range. The tuning voltage is generated by a staircase voltage generator. A discriminator produces an output signal having a nominal value when the receiver is tuned to a transmitted broadcast frequency and at a discriminator output having a predetermined difference from the nominal value, a sequence control circuit halts the operation of the staircase generator and regulates the tuning voltage in a continuous manner under control of the discriminator output signal to complete the tuning process.
    Type: Grant
    Filed: September 7, 1976
    Date of Patent: June 26, 1979
    Assignee: Texas Instruments Deutschland GmbH
    Inventors: Karl Elshuber, Hans Tonn, Laszlo Gotz
  • Patent number: 4158286
    Abstract: An electronic horologic instrument, such as an electronic watch or clock, utilizes randomly-generated energy to produce electrical pulses in synchronism with the generated energy. The electrical pulses are counted until a predetermined count is reached. When this occurs, the timekeeping circuitry is stepped by a unit of time such as one second or some other convenient fraction thereof. The electrical pulses produced, although random over a short time period, have an average rate over a long time period that follows well-established statistics, to provide a horologic instrument with an acceptable degree of accuracy.
    Type: Grant
    Filed: July 6, 1976
    Date of Patent: June 19, 1979
    Assignee: Texas Instruments Incorporated
    Inventor: Alan R. Reinberg
  • Patent number: 4094732
    Abstract: In the manufacture of semiconductor devices it is often times necessary to use photomasks. It has been found that silicon material is useful as see-through photomasks when deposited on a thin film of glass. After deposition the silicon is etched to form the mask. A suitable etchant, which may be used and which does not undercut patterned material formed over the silicon, may be derived from a composition of CCl.sub.4 + N.sub.2 + Cl.sub.2 and in some instances + HCl. This etchant may also be used in patterning polysilicon leads on various silicon devices such as charged coupled devices without undercutting of the leads.
    Type: Grant
    Filed: May 26, 1977
    Date of Patent: June 13, 1978
    Assignee: Texas Instruments Incorporated
    Inventor: Alan R. Reinberg
  • Patent number: 4093922
    Abstract: A television tuning system having a non-volatile memory for storing digital tune words is electrically updated by a microcomputer type architecture control circuitry. A ROM memory matrix is provided for the storage of VHF minimum and maximum binary tune words corresponding to each of twelve VHF channels in addition to a UHF minimum and maximum binary tune word encompassing all possible 72 UHF channels. Tuning of individual VHf and UHF channels is accomplished by incrementing or decrementing a given tune word within the minimum and maximum limits established in the ROM memory matrix by means of a microcomputer processing approach.
    Type: Grant
    Filed: March 17, 1977
    Date of Patent: June 6, 1978
    Assignee: Texas Instruments Incorporated
    Inventor: Kenneth George Buss
  • Patent number: 4093921
    Abstract: A television tuning system having a non-volatile memory for storing digital tune words is electrically updated by a microcomputer type architecture control circuitry. A ROM memory matrix is provided for the storage of VHF minimum and maximum binary tune words corresponding to each of twelve VHF channels in addition to a UHF minimum and maximum binary tune word encompassing all possible 72 UHF channels. Tuning of individual VHF and UHF chanels is accomplished by incrementing or decrementing a given tune word within the minimum and maximum limits established in the ROM memory matrix by means of a microcomputer processing approach.
    Type: Grant
    Filed: March 17, 1977
    Date of Patent: June 6, 1978
    Assignee: Texas Instruments Incorporated
    Inventor: Kenneth George Buss
  • Patent number: 4084130
    Abstract: Semiconductor laser of electrically pumped type comprising a substrate of III-V compound semiconductor material or mixed ternary III-V semiconductor composition having a mesa structure provided with a p-n junction between regions of opposite conductivity therein. An electrical power source is connected to the mesa and upon activation causes the injection of minority carriers across the p-n junction, such that laser radiation is produced from the p-n junction.
    Type: Grant
    Filed: June 11, 1976
    Date of Patent: April 11, 1978
    Assignee: Texas Instruments Incorporated
    Inventor: William C. Holton
  • Patent number: 4077817
    Abstract: A semiconductor laser structure has side facets perpendicular to its substrate and a flat top. The central cavity is an elongated rectangular cavity. A substrate having (100) orientation has a mask patterned thereon with a window having an elongated central member and at least two cross members perpendicular to the axis of the elongated central member. The semiconductor material is grown thereon by liquid phase epitaxy.
    Type: Grant
    Filed: April 4, 1977
    Date of Patent: March 7, 1978
    Assignee: Texas Instruments Incorporated
    Inventor: David W. Bellavance