Abstract: A microprocessor controlled multiple servo system adapted for use with a recording and reproducing apparatus is disclosed. The system controls all servo systems for a magnetic tape recording and reproducing apparatus, including a capstan servo, a reel servo, a scanning drum servo and an automatic scan tracking servo which controls the position of reproduce heads carried by the scanning drum which are of the type which can be transversely moved relative to the longitudinal direction of recorded tracks so as to accurately follow the tracks during special effect reproducing modes, such as slow motion, stop motion and fast motion reproducing. The microprocessor controls all of the servos in a way which permits interaction between the various servo systems and enables more accurate and powerful functional operation of the entire apparatus.

Abstract: In the preferred embodiment of the high density multichannel transducer each channel has two assembled corresponding magnetic core portions, each portion having an intermediate and a rear leg portion, respectively. Both core portions are contiguous with a magnetic pole and each provides a separate flux path. The rear leg portion extends at an acute angle to the intermediate leg portion and it converges towards the transducing gap plane. A recording coil is placed on the intermediate leg portion. The angle of the rear leg portion is selected such that sufficient clearance is provided from the intermediate leg portion to allow winding the reproducing coil directly around the rear leg portion. Interchannel crosstalk is reduced and mechanical damage to the reproducing coil is eliminated.

Abstract: A TV video signal synchronization signal system enables a video device such as a digital special effects system to operate synchronously in response to an input video signal and still produce an output video signal synchronized to a television studio locking reference signal. The video device and the synchronization signal generating subsystem thereof operate in response to a pixel rate clock of approximately 70 ns and in response to a phase command to generate timing for the horizontal sync pulse, color burst signal and video data of the output video signal. The output color burst signal remains phase locked to the locking reference signal with output gating being responsive to the phase command. A ROM interpolator provides subpixel accuracy for the output horizontal sync pulse while output line buffering and interpolation permits the output video data to be phase matched to the reference master sync signal.

Abstract: A programmable time code generator utilizes a synchronous parallel-to-serial data converter for conversion of time code in parallel form into serial form. The resulting longitudinal time code is suitable for recording on magnetic tape in synchronism with an information signal. The time code generator can be readily adapted for various video recording formats, such as NTSC, PAL, PAL-M, SECAM, etc., as well as for synchronous time code generation in other types of recording. In addition, the frequency of the generated longitudinal time code can be changed in a simple manner to be adapted for recording at various tape speeds which are different from the normal playback speed.

Abstract: A small, very low cost, wide margin core memory couples a return current drive scheme with a crossover-free sense winding extending parallel to the Y drive conductors to eliminate the assembly time and wasted substrate space associated with sense winding crossovers. The return currents generate small noise signals which cancel with partial select noise signals to provide noise signals comparable to a 3 wire, 3D bow tie sense winding.

Abstract: In a television camera, the variable gain control is adjusted to provide a corresponding change in the camera output video signal level. The iris control simultaneously is changed to maintain the preset video signal level. This varies the iris setting and provides a corresponding change in the depth of focus to allow focussing on different objects in a scene.

Abstract: A predistortion error signal, corresponding to the third harmonic of an input signal, is generated by obtaining the absolute value of the input signal and multiplying it by the input signal of given sign to provide the square of the latter times the sign of the input signal. The squared signal then is multiplied by the absolute value of the input signal again to provide the desired cube of the input signal.

Abstract: The clock signal to a fine delay shift register is divided by the number of fine delay bits for application to a coarse delay shift register such that two serially connected shift registers can provide a range of delays equivalent to a shift register having a number of bits equal to the product of the bits of the two shift registers.

Abstract: An all-pass filter provides inversion of a chrominance component in a composite signal without separating the chrominance component from the composite signal, to provide for example, synthesizing composite video from a previous line of video. The filter includes an input for receiving the composite signal along a subsequent signal path, and the application of selected, preferably symmetrical weighting factors to selected locations along the signal path. The path includes selected delay means coupled to define a filter output via summing means. The latter provides the composite signal with inverted chrominance without an objectionable change in the relative phase and amplitude of the luminance components relative to the inverted chrominance.

Abstract: A timing error between consecutive tracks of reproduced data from a rotary scan recording/reproducing device is detected as a difference between a normal and actual occurrence of a synchronization signal. A correction signal is provided to reduce the timing error and it is stored, updated and utilized to offset a bit counter synchronous with the reproduced data in the absence of the synchronization signal. The effect of short term dynamic errors is reduced by accumulating occurrences of the timing error in the same direction and updating the stored correction signal only when a predetermined number of occurrences in one direction is obtained.

Abstract: A highly efficient core memory drive system passes currents down a selected X and Y conductor and divides the currents for return through the unselected drive wires in the same X or Y dimension. The drive conductors are coupled to drive and sink switches at a drive end and the X conductors are connected together at an opposite common end and the Y conductors are connected together at an opposite common end. Resistors provide a current path between the drive end of each X conductor and an X resistor bus and between the drive end of each Y conductor and a Y resistor bus. A pair of switching transistors including a sink transistor and a drive transistor is connected to a drive end of each conductor to generate a drive current therein. The drive current divides equally among the unselected conductors at the common end to return through the unselected conductors and through the resistors to the resistor bus.

Abstract: An audio/video editing system presents different menus of editing functions on a display screen and changes the menus as well as performing different editing functions in response to the touching of selected areas of the display screen by an operator. An arrangement of light emitting diodes and photodetectors provides a network of beams across the face of the display screen. Selected beams are interrupted when the operator points his finger at particular characters being displayed on the screen. The display menus and editing functions are controlled by an edit controller which includes a central processing unit having a memory loaded with data from a computer file system, a character generator for providing the various menus on the display screen and a plurality of intelligent line controllers coupled to a plurality of source tape recorders, a record tape recorder and a switcher capable of coupling a different one of the source recorders to the record recorder.

Abstract: A simple demodulator circuit for demodulating high frequency pulse width modulated carrier signals, includes means for charging a capacitor to charge levels commensurate with the pulse widths. Output switch means, biased at the verge of conduction, discharge the capacitor charge at the ends of the pulses as an exponential signal with given time constant. Since the amplitudes of successive exponential signals are proportional to the respective capacitor charge levels, the charge levels are simultaneously read during the discharge process, thereby allowing demodulation at very high speeds.

Abstract: A tape driving capstan comprises a hollow post (39) a capstan member (36) and a rotor (57,58) which extends radially of the capstan member within a housing (49). The rotor carries permanent magnets (59) and a stator winding (66) is disposed within the confines of the rotor.

Abstract: An error amplifier receives an on/off signal and supplies an error signal to an integrator. The latter provides a ramp output, which is fed back to the error amplifier whereby the error signal therefrom further is dependent upon the ramp output. The error signal is selectively clamped positively and negatively whereby the resulting ramp output has a constant ramp time, with no ramp on/off delay.

Abstract: A magnetic transducer assembly having separate core portions with keyways provided therein. The core portions are assembled to form a substantially closed magnetic circuit defining a transducing gap. The keyways form recesses which are contiguous with a transducer inner space provided by the assembled cores. The inner space and recesses are filled with a non-magnetic bonding material. The resulting bond improves the mechanical coupling between the core portions.

Abstract: An address transformation system receives an input address and outputs in response thereto a data store address indicating an operable address location in an associated data store even if the received input address identifies a defective location in the associated data store. The address transformation system includes an address shuffler coupled to receive the input address and output a shuffled address and an address translator coupled to receive the received input address and the shuffled address and output the data store address in response thereto. Economic considerations dictate that the address translator be constructed in such a way that it is unable to accommodate all possible combinations of defective address locations in the associated data store by translating an address indicating a defective location to an address indicating an operable location.

Abstract: Apparatus is disclosed for providing error compensation of a video information signal having a PAL format. Sampling of the analog PAL format video information signal is done at a rate of four times the chrominance subcarrier frequency and is done in a precise manner whereby the samples are taken along orthogonal vector axes that are oriented at 45.degree. relative to the U and V vector axis. When samples are taken at the prescribed locations, substitute samples in the form of multi-bit digital words can be used as replacements for defective or missing sample words, which replacement samples exhibit the same vector phase as the defective sample, but which are taken from either the preceding or succeeding line relative to the line in which the defective sample is located. The apparatus of the present invention obviates the necessity of performing any arithmetic computation to derive the value for the sample to be substituted. Moreover, the sample is spatially closely related to the defective sample, i.e.

Abstract: An improved technique for the counting of servo tracks in a position servo system wherein a single pulse is produced upon each crossing of a reference level by the servo data demodulation signal, the width of which is determined by the velocity of the servo data head relative to the medium.

Abstract: An analog color video information signal is sampled at times determined by a first clock signal of a predetermined frequency whose phase is reversed on every consecutive horizontal line. The obtained samples are digitized and encoded for recording on a magnetic record medium, with the encoded data timed relative to a second clock signal of the predetermined frequency whose phase is continuous. The reproduced encoded data is processed under the control of two additional clock signals, each of which is of the predetermined frequency and has its phase reversed on every consecutive horizontal line. In the processing, the reproduced data is decoded, reclocked relative to a first of the two additional clock signals, has the chrominance component of the video information selectively inverted and converted back to analog form under the control of the second of the two additional clock signals.