Patents Represented by Attorney, Agent or Law Firm John A. Kastelic
  • Patent number: 6016036
    Abstract: A magnetic filter (90) for an ion source (26) is provided. The ion source comprises a housing defining a plasma confinement chamber (76) in which a plasma including ions is generated by ionizing a source material. The housing includes a generally planar wall (50) in which are formed a plurality of elongated apertures (64) through which an ion beam (84) may be extracted from the plasma. The plurality of elongated openings are oriented substantially parallel to each other and to a first axis (66) which lies within the planar wall the first axis being substantially orthogonal to a second axis (68) which also lies within the planar wall. The magnetic filter (90) is disposed within the plasma confinement chamber (76). The magnetic filter separates the plasma confinement chamber into a primary region (86) and a secondary region (88). The magnetic filter comprises a plurality of parallel elongated magnets (90a-90n), oriented at an angle .theta.
    Type: Grant
    Filed: January 28, 1998
    Date of Patent: January 18, 2000
    Assignee: Eaton Corporation
    Inventor: Adam A. Brailove
  • Patent number: 5909031
    Abstract: A plasma-enhanced electron shower (62) for an ion implantation system (10) is provided, including a target (64) provided with a chamber (84) at least partially defined by a replaceable graphite liner (82). A filament assembly (67) attached to the target generates and directs a supply of primary electrons toward a surface (118) provided by the graphite liner, which is biased to a low negative voltage of up to -10V (approximately -6V) to insure that secondary electrons emitted therefrom as a result of impacting primary electrons have a uniform low energy. The filament assembly (67) includes a filament (68) for thermionically emitting primary electrons; a biased (-300V) filament electrode (70) for focusing the emitted primary electrons, and a grounded extraction aperture (72) for extracting the focused primary electrons toward the graphite surface (118). A gas nozzle (77) attached to the target (64) introduces into the chamber a supply of gas molecules to be ionized by the primary electrons.
    Type: Grant
    Filed: September 8, 1997
    Date of Patent: June 1, 1999
    Assignee: Eaton Corporation
    Inventors: Peter L. Kellerman, James D. Bernstein, Brian S. Freer
  • Patent number: 5903009
    Abstract: A plasma-enhanced electron shower (62) for an ion implantation system (10) is provided, including an extension tube (66) having a replaceable graphite inner liner (88). The inner liner is biased to a low negative potential (-6 V) to prevent low energy secondary electrons generated by the electron shower target from being shunted away from the wafer, keeping them available for wafer charge neutralization. The electrically biased inner surface is provided with serrations (126) comprising alternating wafer-facing surfaces (128) and target-facing surfaces (130). During operation of the electron shower (62), photoresist or other material which may sputter back from the wafer collects on the wafer-facing surfaces (128), rendering them non-conductive, while the target-facing surfaces (130) remain clean and therefore conductive. The conductive target-facing surfaces provide a shunt (low resistance) path to electrical ground for high energy electrons generated in the electron shower.
    Type: Grant
    Filed: September 8, 1997
    Date of Patent: May 11, 1999
    Assignee: Eaton Corporation
    Inventors: James D. Bernstein, Brian S. Freer, Peter L. Kellerman
  • Patent number: 5900177
    Abstract: A vertical rapid thermal processing (RTP) system (10) is provided, comprising a vertical process chamber (20) extending along a longitudinal axis (X), and a movable platform (32) disposed within the process chamber and having a support surface upon which one or more substrates such as semiconductor wafers (W) may be mounted for processing. A temperature control subsystem (56, 58, 60) establishes a continuous temperature gradient within the vertical process chamber along the longitudinal axis. The temperature control subsystem comprises a plurality of chamber sidewall heating elements (24) located at different vertical positions along the longitudinal axis. Each of the plurality of heating elements is controlled independently of the other of the plurality of heating elements.
    Type: Grant
    Filed: June 11, 1997
    Date of Patent: May 4, 1999
    Assignee: Eaton Corporation
    Inventors: George T. Lecouras, Dennis P. Rodier
  • Patent number: 5856674
    Abstract: A ribbon filament (86) is provided for a thermionic emission device. The filament comprises an elongated body having a configuration defined by a length, a width, and a thickness. The length comprises a central portion (96) and first and second end portions (98) on either side of the central portion. The width of the central portion is greater than that of the first and second end portions. In addition, the thickness of the filament is substantially less than the width along its entire length. The ribbon filament (86) may be configured as a single helical coil having its first and second end portions (98) mounted to first and second legs (85), respectively, at locations of slots therein. Preferably, the filament (86) is comprised of tungsten and the first and second legs (85) are also comprised of tungsten.
    Type: Grant
    Filed: September 16, 1997
    Date of Patent: January 5, 1999
    Assignee: Eaton Corporation
    Inventor: Peter L. Kellerman
  • Patent number: 5814823
    Abstract: An improved neutral particle detector (52) for an ion implantation system (10) is provided for detecting the neutral particle content of an ion beam (28) which is comprised primarily of neutral particles and positively charged ions. The neutral particle detector (52) comprises (i) a deflector plate (78) residing at a negative electrical potential; (ii) a first collecting electrode (82) residing at a positive electrical potential with respect to said deflector plate (78) for collecting secondary electrons emitted by the deflector plate (78) as a result of neutral particles in the ion beam impacting the deflector plate (78); and (iii) a second collecting electrode (84) residing at a positive electrical potential with respect to said deflector plate (78) for collecting secondary electrons emitted by the deflector plate (78) as a result of positively charged ions in the ion beam impacting the deflector plate (78).
    Type: Grant
    Filed: July 12, 1997
    Date of Patent: September 29, 1998
    Assignee: Eaton Corporation
    Inventor: Victor M. Benveniste
  • Patent number: 5814819
    Abstract: An improved ion beam neutralizer (22) is provided for neutralizing the electrical charge of an ion beam (28) output from an extraction aperture (50). The neutralizer comprises a source of water (52); a vaporizer (54) connected to the source of water; a mass flow controller (56) connected to the vaporizer; and an inlet (60) connected to the mass flow controller. The vaporizer (54) converts water from the source (52) from a liquid state to a vapor state. The mass flow controller (56) receives water vapor from the vaporizer (54) and meters the volume of water vapor output by a mass flow controller outlet (66). The inlet (60) is provided with an injection port (68) located proximate the ion beam extraction aperture (50) and receives the metered volume from the outlet (66). The injection port (68) is positioned near the extraction aperture so that the ion beam and the water vapor interact to neutralize the ion beam.
    Type: Grant
    Filed: July 11, 1997
    Date of Patent: September 29, 1998
    Assignee: Eaton Corporation
    Inventors: Frank Sinclair, Victor Benveniste, Jiong Chen
  • Patent number: 5780863
    Abstract: An electrostatic triode lens (36) is provided for use in an ion implantation system (10). The lens includes a terminal electrode (37) and an adjustable lens subassembly (40) comprising a suppression electrode (38) and a resolving electrode (39), each having matched curved surfaces (108, 110). The lens subassembly is positioned near the terminal electrode where the beam has a minimal waist in a first (dispersive) plane. Such positioning minimizes the required gaps between electrodes, and thus, helps minimize beam blow-up and the electron depletion region in the deceleration mode of operation. The suppression and resolving electrodes each have first and second portions (38A and 38B, 39A and 39B) separated by a gap (d38, d39). A movement mechanism (60, 62) simultaneously moves the first portions of the suppression and resolving electrodes (38A, 39A) toward and away from the second portions of the suppression and resolving electrodes (38B, 39B), respectively, to adjust the gaps (d38, d39) therebetween.
    Type: Grant
    Filed: April 29, 1997
    Date of Patent: July 14, 1998
    Assignee: Eaton Corporation
    Inventors: Victor M. Benveniste, Peter L. Kellerman
  • Patent number: 5675830
    Abstract: A method and system is provided for assigning addresses to input/output (I/O) devices in a control network, and for verifying addresses assigned to the I/O devices. The system comprises a logic controller providing memory into which a connectivity map may be programmed. The connectivity map defines a specific expected address for each I/O device in the system. The logic controller further provides an external controller bus and logic for downloading the connectivity map to an I/O bus manager connected to the logic controller via the external controller bus. The I/O bus manager provides logic for assigning the specific addresses to the I/O devices. Network nodes connect the I/O bus manager to I/O cluster units in the system, each network node including a multiplexer for multiplexing output signals from the I/O bus manager and a demultiplexer for demultiplexing input signals from the I/O cluster units, the multiplexing/demultiplexing functions provided by a controller area network (CAN) integrated circuit.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: October 7, 1997
    Assignee: Eaton Corporation
    Inventor: Keith O. Satula
  • Patent number: 5606666
    Abstract: A computer system is provided in which asynchronously operating processing elements in the system are connected by means of an interconnection media so as to permit communication between an executing program on one of the processing elements with the memory on another processing element. Inter-processing communication logic located on each of the processing elements permits communication between executing programs on any one processing element. Inter-delivery support hardware is provided for interfacing between the interconnection media and the inter-processing communication logic.
    Type: Grant
    Filed: July 19, 1994
    Date of Patent: February 25, 1997
    Assignee: International Business Machines Corporation
    Inventors: Carl H. Grant, Jace W. Krull, Charles E. Kuhlmann, Shahram Salamian, Eugene M. Thomas, James T. Tsevdos
  • Patent number: 5448703
    Abstract: A device for generating back-to-back data transfers on a bus in an information handling system. A detector for determining whether a first address value and a second address are within a range, a first register connected to the detector for storing the first address until the device generates the second address, a second register connected to the detector for storing the range value, and a transfer state block for driving the second address on the peripheral bus without a turnaround cycle if the detector determines that the first and second addresses are within the range. Thus, back-to-back data transfers are provided.
    Type: Grant
    Filed: May 28, 1993
    Date of Patent: September 5, 1995
    Assignee: International Business Machines Corporation
    Inventors: Nader Amini, Ashu Kohli
  • Patent number: 5265211
    Abstract: A computer system is provided comprising system memory and a memory controller for controlling access to system memory, a central processing unit electrically connected with the memory controller, and a bus interface unit electrically connected to the memory controller by a system bus and electrically connected to a plurality of input/output devices by an input/output bus. The bus interface unit is able to sense when said one of said input/output devices has completed a read or write operation over said input/output bus, and includes a buffer circuit wherein read and write data transferred between the system bus and the input/output bus via the bus interface unit is temporarily stored during the transfer. Arbitration control logic resides in said bus interface unit and interacts with a central arbitration controller which resides on the system bus.
    Type: Grant
    Filed: January 2, 1992
    Date of Patent: November 23, 1993
    Assignee: International Business Machines Corporation
    Inventors: Nader Amini, Bechara F. Boury, Richard L. Horne, Terence J. Lohman
  • Patent number: 5255374
    Abstract: A computer system is provided, comprising system memory and a memory controller for controlling access to system memory, a central processing unit electrically connected with the memory controller, and a bus interface unit electrically connected to the memory controller by a system bus and electrically connected to an input/output device by an input/output bus. The bus interface unit includes translation logic for temporarily storing, in response to a predetermined set of operating conditions, data transferred between the system bus and the input/output bus through the bus interface unit.
    Type: Grant
    Filed: January 2, 1992
    Date of Patent: October 19, 1993
    Assignee: International Business Machines Corporation
    Inventors: Alfredo Aldereguia, Nader Amini, Richard L. Horne, Terence J. Lohman, Cang N. Tran