Abstract: A system (10) is provided for approximating a nonlinear function. The system (10) comprises first and second multiple generating circuits (12) and (14) for multiplying a first quantity and a second quantity by up to three integer powers of two. First and second function generating circuits (16) and (18) generate first and second functions of the first and the second quantities by combining the multiples generated in first and second multiple generating circuits (12) and (14). First and second approximation generating circuits (20) and (22) generate first and second approximations of the nonlinear function by shifting the output of first and second function generating circuits (16) and (18). Approximation selecting circuit (24) outputs the appropriate approximation generated in first and second approximation generating circuits (20) and (22).

Abstract: A method and apparatus for measuring submicron linewidths, using diffraction gratings. A set of "fixed-linewidth variable-pitchwidth" test gratings has a number of gratings, each grating having the same linewidth but having different pitchwidths. These gratings are illuminated to form diffraction patterns. A set of peak intensities of the first or second order diffraction image from each grating is recorded. Either of these intensity values forms a curve around an extrema, which represents the intensity from a grating whose pitchwidth is equal to one-half the linewidth.

Abstract: A random access array memory device which uses a static buffer as a cache for speeding the access times achievable for data retrieval from the device. The static buffer is operationally divided into two or more blocks so that each block holds a block of data from a different row of the array. The division of a single buffer into several operational blocks significantly increases the "hit" probability of the cache, allowing fast access from the buffer. A control system stores the row address (TAG) of each of the multiple blocks and compares that address to the row address of the data desired and signals the result of that comparison. Random access memory arrays of the multiple line cache configuration are employed in data processing systems including a CPU, address and data buses, control logic, and multiplexers.