Abstract: There is disclosed a scalable switch fabric architecture comprising: 1) an input switching stage having N inputs and N outputs operable to connect selected ones of the N inputs to selected ones of the N outputs; 2) an output switching stage having M inputs and M outputs operable to connect selected ones of the M inputs to selected ones of the M outputs; 3) a multiplexer stage having a plurality of W-bit input channels and a W-bit output channel, wherein the output channel is coupled to the M inputs of the output switching stage; and 4) a removable core switching stage having N inputs adapted for coupling to the N outputs of the input switching stage and having M outputs adapted for coupling to a first input channel of the multiplexer stage.