Abstract: There is disclosed a test apparatus for use in a wireless network base station comprising a non-radio unit for processing baseband signals and a radio unit separate from the non-radio unit for transmitting and receiving radio frequency (RF) signals. The test apparatus comprises: 1) a housing; 2) a first connector coupled via a first cable to the radio unit, wherein the first cable comprises signal lines carrying base station signals between the radio unit and the non-radio unit; 3) a second connector coupled via a second cable to the non-radio unit, wherein the second cable comprises signal lines carrying the base station signals between the radio unit and the non-radio unit; and 4) a first access connector that allows a signal measuring device to monitor at least one of the base station signals.

Abstract: Software inverse multiplexing within an Asynchronous Transfer Mode (ATM) communication network is provided by a first ATM switch receiving a stream of ATM cells over a high bandwidth communication link. A Segmentation and Re-assembly (SAR) module associated with the first ATM switch thereafter reassembles the received ATM cells into corresponding user packets. Control data identifying the sequence of assembled user packets are added to each user packet and de-assembled into corresponding ATM cells. The de-assembled ATM cells are then communicated over a plurality of low bandwidth communication links to a second ATM switch. The second ATM switch receives the transmitted ATM cells over said low bandwidth communications links. A SAR module associated with the second ATM switch thereafter reassembles the received ATM cells into corresponding user packets. Utilizing the enclosed control data, received user packets are re-synchronized into their original sequence.

Abstract: There is disclosed a scalable switch fabric architecture comprising: 1) an input switching stage having N inputs and N outputs operable to connect selected ones of the N inputs to selected ones of the N outputs; 2) an output switching stage having M inputs and M outputs operable to connect selected ones of the M inputs to selected ones of the M outputs; 3) a multiplexer stage having a plurality of W-bit input channels and a W-bit output channel, wherein the output channel is coupled to the M inputs of the output switching stage; and 4) a removable core switching stage having N inputs adapted for coupling to the N outputs of the input switching stage and having M outputs adapted for coupling to a first input channel of the multiplexer stage.