Abstract: An overvoltage protector for protection of telecommunication equipment having a pair of line terminals, and a respective pair of levers forming part of the ground circuit, with an overvoltage protective device bonded under tension between each line terminal and each respective lever. When an overvoltage destroys one or other device, or the bond between the line terminal and the respective lever disappears, that lever pivots about a single fulcrum under a force applied by a spring and the end of that lever contacts the line terminal. This ensures an electrically conductive relation between the line terminal and the ground circuit. As a result, the equipment to which the overvoltage protector is applied is protected from lightning and successive overvoltage occurrence.

Abstract: A plurality of pairs of parallel conductive wires are supported by a flexible non-conductive sheet, equidistant from two conductive ground meshes which sandwich the wires therebetween. Each mesh forms a matrix, defining an array of intersecting conductors. The offset of the intersections from the conductive wires incrementally changes along the longitudinal axes of the pair of conductive wires. This ensures the capacitance between each conductive wire and the mesh is substantially balanced regardless of where the conducive wires run, so that cross talk between the pairs of conductive wires will remain relatively low.

Abstract: A differential ECL (emitter coupled logic) circuit, with differential inputs and output and no series gates, comprises a plurality of transistor pairs. The differential ECL circuit can operate at high speed as there are no series gates and its noise margin is large because of differential operation. The differential circuit can be implemented into various logic circuits such as XOR (exclusive OR)/NXOR, OR/NOR, AND/NAND.

Abstract: An optical apparatus for transfer of full-duplex data signals over an optical waveguide comprises electro-optic transducers, coupled to the optical waveguide at opposite ends thereof. The electro-optic transducers are responsive, in a first mode, to drive signal pulses to produce transmit optical signal pulses for transmission along the optical waveguide and responsive, in a second mode, to receive optical signal pulses detected by the electro-optic transducer means to produce detected signal pulses. Drivers, coupled to the electro-optic transducers, generate pairs of the drive signal pulses in response to each transmit bit of the data signals. Receivers, also coupled to the electro-optic transducers, generate receive bits of the data signals in response to at least one of each pair of the detected signal pulses.

Abstract: A leadframe comprises interconnect leads for providing connection between wire bonding leads extending from bondpads on a semiconductor die and conductors of an integrated circuit package in a one-to-one relationship. The bondpads on the semiconductor die are grouped into at least one set, the bondpads therein being substantially equidistantly spaced along a linear baseline. Each of the interconnect leads has a bondtarget at one end thereof for connection to a respective wire bonding lead and is substantially equidistantly juxtaposed from a point corresponding to the position of a respective bondpad and extending collinearly from a linear extension of the respective point to the bondtarget. The spacing between adjacent bondtargets is substantially equidistant and substantially greater than the spacing between adjacent bondpads so that the bondtargets form a set in the form of a contiguous arc.

Abstract: A logic function circuit has M columns of N series-connected flip-flops, M logic circuits and M multiplexers. Each logic circuit and multiplexer are associated with a respective column. The multiplexers determine operation and test modes. In the operation mode, each logic circuit acts on data from the Nth row flip-flop and a multiplexed input signal, and its logic result data is latched into the first row flip-flop of the respective column. In the test mode, a scan data stream of M.times.N bits is transferred through the M.times.N flip-flops and stored therein. Thereafter, a test data bit, instead of the input data signal, is fed to the logic circuits. By verifying the logic result data based on the latched scan data and the test data, it can be determined whether the logic circuits and the flip-flops are functioning properly.

Abstract: A reference voltage generator can provide RAMs (random access memories) with a reference voltage (generally mid-way between a supply voltage and a common potential), with improved follower characteristics. When the supply voltage and/or the load condition of the RAMs are significantly altered, the reference voltage is rapidly adjusted by dynamic switching FETs, being pulled down or up. Under balanced conditions when essentially no current flows in the switching FETs, overall power consumption is low.

Abstract: A multilingual database system is disclosed in which data can be searched and retrieved by a user whether or not that data is in the user's own language. The data to be stored in the database is first encoded according to a master (or universal) sort order.

Abstract: A scaler comprising a plurality of flip-flops, varies its frequency division to correct phase by 0.5 clock cycle. Each flip-flop is continuously and synchronously responsive to either a rising or a falling edge of the clock pulses. Normally, the scaler's state transits along one of two loops, which generate output pulses having identical repetition rates. When a control signal is applied, the scaler's state transits from one loop to the other, generating at least one output at an alternative repetition rate. The alternative repetition rate is either lower or higher than the identical repetition rate by an integral number of half cycles of the input clock pulses. Where there are two control signals, a lower or higher alternative repetition rate can be selected. Since the flip-flops are responsive to either edge of the clock pulses without clock gating interruptions, there is no jitter and the scaler's robustness is improved. Also the clock frequency can be effectively halved.

Abstract: A printed circuit path, which connects to a reference potential point, is provided along a portion, or more, of a printed circuit board (PCB) assembly which requires protection from electrostatic discharge (ESD). This printed circuit board path has a plurality of intentionally pointed protrusion integrally formed along its length and which point preferably toward the direction from which the electrostatic discharge is likely to approach the printed circuit board assembly; i.e. through housing mating edges or housing surface openings. The pointed conductor path is locate closer to the ESD regions of concern than other circuit paths or component solder pads. The pointed protrusion preferentially attract electrostatic discharges to itself rather than allow the discharges to strike other paths or components further in on the PCB assembly, thereby avoiding component damage.

Abstract: A control circuit for a telephone answering device provides the capability of disconnecting the telephone answering device from a telephone line and powering a microphone contained within a telephone handset connected to the telephone answering device. Recording of outgoing messages can then be done through the telephone set thus reducing background and tape noise. The control circuit also provides the capability of disabling the functions of the telephone answering device when any telephone set, connected to the same telephone line as the telephone answering device, is taken off-hook.

Abstract: A shutter mechanism for a telephone directory that stores telephone numbers to be dialed. The directory has physical spaces for the entry of descriptive labels (e.g. names). The shutter mechanism has a first planar surface for providing these physical spaces. It has a second planar surface overlying the first surface. The second surface is divided into alternating opaque and transparent sections such that the surface having the names can be moved underneath the second surface such that the names can be hidden by the opaque sections or revealed by the transparent sections.

Abstract: A latching mechanism for use with a plug-in cartridge or the like. The latching mechanism comprises a body portion; a pair of walls extending from the body portion; a camming portion; and an actuating portion. The walls of the latching mechanism are snap locatable onto pivot pins on a face plate of the plug-in cartridge, or the like, and thereby allow the latching mechanism to pivot on the face plate. Furthermore, the walls of the latching mechanism have apertures which are snap locatable onto detents on the face plate thereby resiliently latching the latching mechanism when it is fully inserted into a cabinet. The camming portion projects from the latching mechanism and is used for engaging a cooperating projection on a cover of the cabinet.

Abstract: A method of facilitating the alphabetical dictionary sorting, by computer, of words based upon characters from a multilingual alphabet, especially the repertoire of characters defined in the new standard alphabet known as ISO 8859/1. This invention uses an encoding scheme to determine the language dependent sort orders for the characters defined in ISO 8859/1. This encoding scheme removes the dependency of sorting on the character set's internal collating representation. This method allows the same sorting software to support many (if not all) of the languages supported by the alphabet. By storing the language dependent sort orders as data files, the sorting software is immune to the user's language and hence is highly portable. The number of languages supported is directly proportional to the number of data files available.

Abstract: A snap-together enclosure comprises a cover, a shutter mechanism, and a base plate. The enclosure is designed to encase a jack receptacle body which is heat staked to a terminal block. The shutter mechanism is snapped into a hole in the cover and is held in place by means of tabs on the shutter and interfering ridges on the cover. The terminal block is snapped into the base plate by means of tabs on the base plate and interfering ridges on the terminal block. Finally, the cover is snapped onto the base plate, again by use of tabs and interfering ridges on the cover and base plate respectively. When the cover and shutter assembly is attached to the base plate, the jack receptacle body, enclosed therein, pushes against back walls of the tabs on the shutter to prevent the shutter from disengaging with the ridges on the cover.

Abstract: A conductor-dielectric-semiconductor device and a method of making such a device which has an insulating silicon-dioxide dielectric layer on a silicon substrate, and a conductive layer over a region of the dielectric layer. Silicon ions have been implanted into the region under the conductive layer. Depending upon the thickness of the region and the concentration of implanted silicon ions, the device can function as an IGFET memory device or a vertical resistor between the conductive layer and the substrate.

Abstract: A dual tone multi-frequency (DTMF) receiver for use in detecting digitally transmitted signals in the telephone industry. The receiver derives linear predictive coefficients for the digital signals in the data frame. This information is used to compute frequency response magnitudes at the DTMF frequencies. A plurality of magnitude comparisons are then performed to verify the presence of true DTMF signals and concurrently the frequency of these signals is obtained.