Abstract: A communication system including a base station (102) and a handset (104) provides a reduced level of near end reflections which results in a reduced level of sidetone for both near end and far end users. The base station includes an echo canceler (124) that trains on noise generated by the echo canceler (124) during inter digit dialing.

Abstract: A base station (102) automatically remotes to a speakerphone mode of operation and connects an incoming call while an external electronic device (104) is simultaneously controlled.

Abstract: A carry case (102) for transporting an electronic device, such as a radio (100) or controller module (300), and providing paging capability when combined with the electronic device. The carry case includes a housing and contained within the housing is a first part or first section of a pager while the electronic device contains a second part or second section of the pager. Electrical interface contacts (504) located within the carry case (102) and electrical interface contacts (204) located within the electronic device allow for the paging circuitry to connect and form a complete pager. The electrical interface contacts of the electronic devices are common so that either can be combined with carry case (102) to provide either a radio and pager combination or a pager only option.

Abstract: A sidetone optimization circuit (230) provides the capability to adjust sidetone level received at a telephone handset to a desired level. A noise source (204) generates a noise signal that gets filtered by filter (206) in order to provide band limited noise to a telephone interface circuit (202). Telephone interface circuit (202) provides a sidetone signal (210), also known as a trans-hybrid loss signal. The trans-hybrid loss signal is filtered at filter (212) and transformed to a DC level at detector (214). The DC level is then compared to a predetermined threshold at comparator (224), and a variable impedance circuit (218) is adjusted until the DC level reaches the predetermined threshold in order to achieve a desired level of sidetone.

Abstract: A transconductance scaling circuit (500) includes an operational transconductance amplifier (504) having a tunable voltage, V.sub.tune2. A feedback loop controls the tunable voltage, V.sub.tune2, in response to the digital programming of the transconductance amplifier (504) and provides the tunable voltage as a current scaling output.

Abstract: A communication system (100) provides simultaneous synchronization between a network controller (106) and numerous radio ports (102) using a single signaling channel. The network controller (106) includes a multiframe synchronization generator (208) which generates a multiframe synchronization packet (302) in response to a series of counters (212) and a timing reference (202). Each radio port (102) includes a multiframe synchronization detector (410) which verifies that the multiframe synchronization packet (302) is error free.

Abstract: A combined radiotelephone and paging device (101), hereinafter the combined unit, normally operates as a radiotelephone. In response to a predetermined condition, the combined unit operates as a paging device. The predetermined conditions include low battery voltage and poor communication channel quality or a request signal from a remote transceiver (109) of the radiotelephone system. The paging system and the radiotelephone system may be independent communication systems or they may be a single communication system. The combined unit (101) and its unique switching characteristics allows the combined unit (101) to utilize the paging devices beneficial qualities of lower power consumption and broader service range to enhance the usefulness of a radiotelephone.

Abstract: An antenna system (202) provides communication capabilities in both extended and retracted positions. Antenna system (202) includes a base helical (214) that capacitively couples to a half wavelength radiator (222) in the extended position. Base helical (214) capacitively couples to a top helical (228) in the retracted position, thereby reducing case currents on the surface of the housing (206).

Abstract: A method for providing isolation between first and second receivers (314, 316) located within a radio (300) is configured in software. The first receiver (314) synchronizes to the second receiver (316) in their respective battery saver modes such that the two receivers are never on at the same time.

Abstract: The present invention comprises a method and apparatus for selecting one of at least two antennas (202, 204) in a communication unit (200) for use in a wireless communication system (100). A signal is received by a radio frequency receiver during a receiving period from one of the at least two antennas (202, 204) currently selected by an antenna switch (206), the signal transmitted in a digital communications format comprising a plurality of bits. The quality of the receive signal is determined by a switch diversity algorithm programmed into a microcomputer (212) that bases the decision to switch antennas on predetermined thresholds established for each of: a received signal strength indicator, a phase error signal, and a recovered clock signal.

Abstract: A tuning circuit for a reference oscillator (200) including voltage variable capacitors (222, 224) in a back to back configuration and providing a control terminal for voltage controlled tuning of the reference oscillator (200). Also included in the tuning circuit is a modulation bias circuit for modulating the reference oscillator (200).

Abstract: A nested digital phase lock loop (DPLL) circuit (400) provides center bit sampling for incoming recovered data (406). Included in the nested DPLL circuit (400) are a narrow bandwidth DPLL (402) and a wide bandwidth DPLL (404) which generate first (410) and second (428) recovered clock signals respectively. Initially the first recovered clock signal (410) is used to clock in the recovered data (406) until the narrowband DPLL (402) is stabilized. Once the narrowband DPLL (402) is stabilized, the second recovered clock signal (428) generated from the wideband DPLL (404) is switched in by a multiplexer (424). If for any reason the center bit sampled data becomes corrupted, a RESET occurs in the wideband loop (404) to zero out the phase shift of the second recovered clock signal (428) to match that of the narrow loop. Thus, when a RESET occurs, the wideband loop is tracking at exactly the same clock rate as the narrowband loop.