Abstract: A method and apparatus are provided for repairing clear defects in photomasks such as attenuated photomasks having a patterned MoSi film on a glass substrate. The method and apparatus use an energy source in the form of an energy beam to undercut the sidewalls of the clear defect forming a clear defect having angled sidewalls. A repair material is then deposited in the angled opening to repair the clear defect. In a preferred embodiment, two repair steps are used with the first repair step using a first repair material to deposit a first repair material on the angled sidewalls of the clear defect and a second step using a second repair material to contact the first repair material and to fill the remainder of the clear defect opening. An apparatus for repairing clear defects and photomasks repaired by the method and apparatus of the invention is also provided.

Abstract: A method and apparatus are provided for the electroplating of a substrate such as a semiconductor wafer which provides a uniform electroplated surface and minimizes bum-through of a seed layer used on the substrate to initiate electroplating. The method and apparatus of the invention uses a specially defined multistep electroplating process wherein, in one aspect, a voltage below a predetermined threshold voltage is applied to the anode and cathode for a first time period followed by applying a current to the anode and cathode for a second time period the current producing a voltage below the predetermined threshold voltage. In another aspect of the invention, a current is applied to the anode and cathode substrate which current is preprogrammed to ramp up to a current value from a first current value which current produces a voltage below a predetermined threshold voltage.

Abstract: A method and apparatus are provided for forming metal circuit patterns and other designs on greensheets and other substrates. The method and apparatus utilize a metal containing transfer sheet whereby selected portions of the metal containing transfer sheet are transferred to the greensheet forming the desired circuit pattern and then the transfer sheet removed. The metal containing transfer sheet may contain a release layer. Transfer methods include stamping, hot rolling, laser beam, heat, etc. and combinations thereof The transfer sheet may also have a stratified or graded vertical profile so that different conductivities or other circuit properties (transfer sheet adhesion, etc.) may be obtained in the formed pattern on the substrate.

Abstract: A method is provided for making optical waveguide structures in a semiconductor device wherein a rectangular cross-section low index of refraction material is encapsulated in a trench by a high index of refraction material. The waveguide structures may be made in a device containing copper conductors in trenches by forming new trenches to hold the optical waveguide. Copper conductor containing trenches may also be made in an electronic component containing waveguide structures and a further method is provided for forming an optical waveguide structure by replacing a copper containing trench with the waveguide structure in an electronic component having a plurality of copper containing trenches. All the methods use conventional techniques so that the fabrication of a semiconductor device containing both optical waveguide structures and copper conductor structures can be made both efficiently and economically.

Abstract: A gang punch tool assembly and method is provided for punching holes in a plurality of greensheets which are processed sequentially through the assembly. The punch mechanism is a gang punch cooperating with a corresponding die and the greensheet is automatically fed to the gang punch and die, the greensheet punched and then the punched greensheet removed from the punch area and another greensheet positioned for punching. Operation of the gang punch apparatus is efficient and effective and has a high greensheet throughput. A preferred gang punch uses a pressurizable air chamber for controlling punching of the greensheet without damage to the greensheets or gang punch mechanism.

Abstract: A method of providing sub-half-micron copper interconnections with improved electromigration and corrosion resistance. The method includes double damascene using electroplated copper, where the seed layer is converted to an intermetallic layer. A layer of copper intermetallics with hafnium, lanthanum, zirconium or tin, is provided to improve the electromigration resistance and to reduce defect sensitivity. A method is also provided to form a cap atop copper lines, to improve corrosion resistance, which fully covers the surface. Structure and methods are also described to improve the electromigration and corrosion resistance by incorporating carbon atoms in copper interstitial positions.

Abstract: An apparatus and method are provided for cleaning (removing) contaminating particles and/or films from substrate surfaces such as semiconductor wafers during the fabrication process for making electronic components. The method and apparatus use a liquified gas contained in a distributor which has been energized with megasonic energy in the distributor and the energized liquefied gas directed as a stream against the surface to be cleaned from an outlet distribution nozzle of the distributor. The stream is preferably impinged on the substrate surface at an acute angle. The preferred liquified gas is carbon dioxide.

Abstract: A method and apparatus is provided for planarizing damascene metallic circuit patterns of a plurality of discrete integrated circuit chips on a metal coated silicon wafer wherein the circuitry on the chips on the wafer are either designed to be within a defined high metal density circuit range and low density metal circuit range and/or to provide dummy circuitry in the damascene process to provide a substantially uniform circuit density over the chip and the wafer surface. It is preferred that each chip on the surface of the wafer be divided into a plurality of regions and that each region be provided with dummy metallization, if necessary, to provide a relatively uniform circuit density in that region and consequently on the wafer surface. The invention also contemplates adding dummy circuitry to the periphery of the wafer in areas which are not formed into chips (chip fragments). The invention also provides semiconductor wafers made using the method and/or apparatus of the invention.

Abstract: A solder column structure particularly useful for joining electronic components by C-4 interconnection is provided comprising a solder column attached at one end to one of the substrates being joined and having a layer of indium at the other end. During reflow, to join the other substrate, the indium melts with part of the solder column forming a Pb—Sn—In ternary alloy joint having enhanced fatigue resistance. A method for using the solder column to make electronic component assemblies and electronic component assemblies made using the method and solder column are also provided.

Abstract: An electronic component structure assembly comprising a thin film structure bonded to a multilayer ceramic substrate (MLC) using solder connections and wherein a non-conductive, compliant spacer preferably with a layer of thermoplastic adhesive on each surface thereof is interposed between the underlying MLC carrier and overlying thin film structure. The spacer includes a pattern of through-holes which corresponds to opposing contact pads of the thin film structure and MLC. The contact pads of at least one of the thin film structure or MLC have posts (e.g., metallic) thereon and the posts extend partly into the spacer through-holes whereby the height of the posts are greater than the thickness of the adhesive. The posts of the MLC have solder bumps thereon. After reflow under pressure the thin film structure is electrically and mechanically connected to the MLC and the join method has been found to provide a reliable and cost-effective process. The joined components also have enhanced operating life.

Abstract: A gang punch tool assembly and method is provided for punching holes in a plurality of greensheets which are processed sequentially through the assembly. The punch mechanism is a gang punch cooperating with a corresponding die and the greensheet is automatically fed to the gang punch and die, the greensheet punched and then the punched greensheet removed from the punch area and another greensheet positioned for punching. Operation of the gang punch apparatus is efficient and effective and has a high greensheet throughput. A preferred gang punch uses a pressurizable air chamber for controlling punching of the greensheet without damage to the greensheets or gang punch mechanism.

Abstract: The present invention is directed to a method and process to reduce plasma etch fluting during etching of a pattern on a semiconductor substrate by modifying the resist profile. The present invention forms a resist structure profile having an overhang or undercut, which is not in contact with the surface of the substrate. The overhang results in a shadowed region on the substrate from the primary etch direction adjacent to the base of the resist structure. Since the overhang is not in direct contact with the substrate surface, the resist pattern does not transfer into the surface of the substrate during etching and fluting is reduced or eliminated.

Abstract: A multilayer interconnected electronic component having increased electromigration lifetime is provided. The interconnections are in the form of studs and comprise vertical side walls having a refractory metal diffusion barrier liner along the sidewalls. The stud does not have a barrier layer at the base thereof and the base of the stud contacts the metallization on the dielectric layer of the component. An adhesion layer can be provided between the base of the stud and the surface of the metallization and the adhesion layer may be continuous or discontinuous. The adhesion layer is preferably a metal such as aluminum which dissolves in the stud or metallization upon heating of the component during fabrication or otherwise during use of the component. A preferred component utilizes a dual Damascene structure.

Abstract: A method and apparatus are provided for the electroplating on only one side of a substrate immersed in an electroplating bath using a device which holds the substrate to be plated in spaced relation to an inhibitor electrode of the device. To fabricate x-ray masks, a boron doped silicon substrate is secured to a dielectric clamp ring which clamp ring has a through opening which overlies the inhibitor electrode. A cathode structure overlies the clamp ring and the cathode structure, substrate and clamp ring are secured to the device by a pivotable, locking mechanism. A space is formed between the back side of the substrate and the surface of the inhibitor electrode so plating occurs on the surface of the inhibitor electrode. The substrate holding apparatus comprises a plate member to which the inhibitor electrode is secured. The clamp holding the substrate overlies the inhibitor electrode and a cathode structure is secured against the plate member.

Abstract: This invention relates to a solder structure which provides enhanced fatigue life properties when used to bond substrates particularly at the second level such as BGA and CGA interconnections. The solder structure is preferably a sphere or column and has a metal layer wettable by solder and the structure is used to make solder connections in electronic components such as joining an electronic module such as a chip connected to a MLC which module is connected to a circuit board. The solder structure preferably has an overcoat of solder on the metal layer to provide a passivation coating to the metal layer to keep it clean from oxidation and corrosion and also provide a wettable surface for attachment of the solder structure to solder on the pads of the substrate being bonded.

Abstract: An apparatus for polishing a semiconductor wafer is provided comprising a wafer carrier to provide a force against a wafer and a rotating polishing pad during the polishing operation and a polishing slurry dispenser device disposed to dispense the slurry toward the pad preferably as a stream or more preferably drops toward the pad surface and a curtain of air to intersect the slurry at or near the polishing pad surface. The wafer is polished using less slurry than a conventional polishing apparatus while still maintaining the polishing rates and polishing uniformity of the prior art polishing apparatus. A preferred dispenser is an elongated housing having a slurry tube and air tube therein each tube having a plurality of spaced apart slurry openings and air openings along its longitudinal axis which tube is preferably positioned radially over at least one-half the diameter of the polishing pad.

Abstract: A solder preform is provided for forming interconnections between multilayer ceramic substrates comprising an upper layer and lower layer of solder separated by an intermediate layer of a material which is wettable by solder and which does not melt at the temperatures used to reflow the solder and form the connections. The solder preform is used to join the substrates and is particularly useful to simultaneously electrically interconnect the substrates and to form a hermetic seal between the substrates being joined.

Abstract: A method and apparatus for repairing transparent defects in a transfer layer circuit pattern in the process of fabricating an attenuated mask is provided comprising forming a sacrificial removable layer on the transfer layer including the part of the transfer layer having a transparent defect and then forming a patch to cover the transparent defect. After applying the sacrificial removable layer and patch, the sacrificial removable layer and unwanted exposed attenuated mask material is removed leaving the patch having an undercoating of sacrificial removable layer in the transparent defect region. The undercoat sacrificial removable layer is then at least partially etched and the patch and sacrificial layer removed by a lift off procedure. The transfer layer is then removed leaving the attenuated mask having the desired circuit pattern on the surface of the transparent mask substrate. Attenuated masks made using the method and apparatus of the invention are also provided.

Abstract: A method of providing sub-half-micron copper interconnections with improved electromigration and corrosion resistance. The method includes double damascene using electroplated copper, where the seed layer is deposited by chemical vapor deposition, or by physical vapor deposition in a layer less than about 800 angstroms.

Abstract: Multilayer glass ceramic substrate electronic components having enhanced flexibility and strength are prepared using greensheets as a top and/or bottom layer, which greensheets are made from a glass-ceramic greensheet casting composition comprising crystallizable glass, a binder resin and a solvent system, and preferably a plasticizer. The top and/or bottom greensheets have a lower coefficient of thermal expansion (CTE) than the greensheets used to make the internal layers of the MLC and both greensheets are characterized by having, after sintering, a microstructure which is greater than 99% crystalline. A crystalline matrix forming material such as P2O5 is preferably used in the composition. This type structure, in combination with the lower CTE, has been found to provide an MLC having enhanced strength and flexibility.