Patents Represented by Attorney John P. Abate, Esq.

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  • Enhanced PFET using shear stress
    Patent number: 7274084
    Abstract: A semiconductor device structure includes a gate structure disposed on a portion of substrate, source and drain regions disposed adjacent to the portion so as to form a channel region in the portion, and trench isolation regions located immediately adjacent to the source and drain regions. At least portions of the trench isolation regions include stress materials such that the materials generate shear stresses in the channel region.
    Type: Grant
    Filed: January 12, 2005
    Date of Patent: September 25, 2007
    Assignee: International Business Machines Corporation
    Inventor: Dureseti Chidambarrao