Abstract: A method for loading a model of Meta Object Facility (MOF) includes creating a first MOF instance including a model of MOF that is based upon a stored definition of MOF, rebuilding the first MOF instance to make it a metamodel of itself, instantiating the first MOF instance to create a second MOF instance, loading the stored definition of MOF into the second MOF instance and rebuilding the second MOF instance to make the second MOF instance a metamodel of the second MOF instance.

Abstract: A method for loading a model of Meta Object Facility (MOF) includes creating a first MOF instance including a model of MOF that is based upon a stored definition of MOF, rebuilding the first MOF instance to make it a metamodel of itself, instantiating the first MOF instance to create a second MOF instance, loading the stored definition of MOF into the second MOF instance and rebuilding the second MOF instance to make the second MOF instance a metamodel of the second MOF instance.

Abstract: A method for data communication includes receiving a data packet that includes at least one contiguous data item, defining a window that initially includes the beginning of the data items, determining whether the window includes a part of a split data item and processing the contiguous data items when there are no split data items. The method also includes processing all data items occurring before a split data item when a split data item is found, storing the first part of a split data item, moving the window to include both parts of the split data item, appending the stored first part to the second part to create an appended packet and processing the appended packet.

Abstract: A method for a first participant to establish a shared secret with a second participant, where the first participant and the second participant share a password-based first master key and a hash function includes sending a first message including a first private value for the second participant and a first authenticator for the second participant encrypted with the first master key. The first message also includes a first hashed authenticator for the first participant encrypted with a first shared secret key. The first message also includes a first public value for the first participant. The first participant receives a second message, the second message including the first authenticator for the second participant and a first public value for the second participant encrypted with the first shared secret key.

Abstract: A method for determining the performance of a first processor in a computer network in which the first processor is connected to a second processor includes incrementing a request count when the second processor requests data from the first processor, incrementing a reply count when the second processor receives data from the first processor, dividing the reply count by the request count to create a ratio and indicating the performance of the first processor is less than expected when the ratio is less than a threshold. An apparatus for determining the performance of a first processor includes at least one memory having program instructions and at least one processor coupled to the first processor.

Abstract: A method for interpreter optimization includes receiving multiple data units organized according to a first endian order, reordering the data units according to a second endian order and interpreting the reordered data units. According to one aspect, the data units include at least one opcode having at least one operand, each operand including at least one data unit. According to another aspect, a class loader reorders the code within a classfile from big-endian format to little-endian format.

Abstract: A method for arithmetic expression optimization includes receiving a first instruction defined for a first processor having a first base, the first instruction including an operator and at least one operand, converting the first instruction to a second instruction optimized for a second processor having a second base when all operands do not carry potential overflow or when the operator is insensitive to overflow, the second base being smaller than the first base, and converting to a wider base a third instruction that is the source of the overflow when the at least one operand the potential for overflow and when the operator is sensitive to overflow.

Abstract: A method of operating a computer system includes providing a program in memory, verifying the program prior to an installation of the program and generating a program fault signal when the verification fails. The program includes at least one program unit, and each program unit includes an Application Programming Interface (API) definition file and an implementation. Each API definition file defines items in its associated program unit that are made accessible to one or more other program units and each implementation includes executable code corresponding to the API definition file. The executable code includes type specific instructions and data. Verification includes determining whether a first program unit implementation is internally consistent, determining whether the first program unit implementation is consistent with a first program unit API definition file associated with the first program unit implementation and generating a program fault signal when the verifying fails.

Abstract: A system for executing a software application comprising a plurality of hardware independent bytecodes is provided comprising a computing system that generates bytecodes, a virtual machine, remote to the computing system, that receives a plurality of bytecodes from said computing system, and executes said plurality of bytecodes, a system for testing said bytecodes against a set of predetermined criteria in which the testing is securely distributed between said virtual machine and said computing system so that the bytecode verification completed by the computing system is authenticated by the virtual machine prior to the execution of the bytecodes by said virtual machine. A method for distributed bytecode verification is also provided.

Abstract: An apparatus for image contrast modulation includes a memory for storing a scaling factor and a memory for storing a pixel position. A pixel determiner calculates the position of another pixel based upon the pixel position and the scaling factor. A segment determiner ascertains which segment of the segmented line contains the pixel position. A coefficient generator determines which coefficient is associated with the line segment. A method for image contrast modulation includes defining at least one multi-segmented line that approximates a higher order curve including more than one pixel in a source image, and line-fitting pixel intensity values in a scaled image according to a multi-segmented line.

Abstract: A small footprint device can securely run multiple programs from unrelated vendors by the inclusion of a context barrier isolating the execution of the programs. The context barrier performs security checks to see that principal and object are within the same context or to see that a requested action is authorized for an object to be operated upon. Each program or set of programs runs in a separate context. Access from one program to another program across the context barrier can be achieved under controlled circumstances by using an entry point object.

Abstract: An apparatus for scalable image processing includes a display, multiple graphics functional units and a mode selector. Each of the graphics functional units has a configuration of a predetermined type to control the display. The mode selector determines which combination of graphics functional units controls the display. A method for scalable image processing includes monitoring at least one parameter, determining whether to switch from one graphics functional unit configuration to a new graphics functional unit configuration based upon one or more of the parameters, and switching to the new graphics functional unit configuration.

Abstract: Language subset validation includes validating multiple program modules that comprise a program. The program modules include multiple bytecodes defined for a first computer language that is a hardware-dependent subset of a second computer language. The validation includes indicating an error condition for items in the multiple program modules that are not defined for the first computer language, indicating an error condition for items in the multiple program modules that are not supported by an execution environment of the first computer language and indicating an error condition for items in the multiple program modules that are defined for the first computer language but used in a manner inconsistent with the first computer language.

Abstract: A method and apparatus for video motion compensation, power of two reduction and color format conversion is disclosed. The motion compensation engine performs the MPEG-2 functions of half pel compensation, inverse discrete cosine transform and merge. Dual prime, field-based and frame-based macroblocks are supported. Data reduction may be performed in the vertical direction, the horizontal direction, or both.

Abstract: A browser-independent and automatic apparatus and method for receiving, installing, and launching applications from a browser is described. According to one embodiment, a helper application is registered with a browser for a specified file type. When the browser encounters a link to a metafile of the specified file type, the file is downloaded to the requesting system and the helper application is invoked to process the downloaded file. In the context of a Java™ implementation, the downloaded metafile comprises a short launch file specification for a Java™ application, and specifies a classpath as a set of Universal Resource Identifiers (“URIs”), a Java™ Runtime Environment (“JRE”) version, security considerations, and other relevant information concerning the Java™ application to be executed.

Abstract: A method for including opcode information in an opcode includes numbering the opcode such that a property of the opcode is represented by at least one bit of the opcode. According to one aspect, the number of data units required to advance to the next opcode is encoded into the opcode value itself. According to another aspect, opcodes are numbered such that opcodes having the same properties have opcode values in the same opcode range.

Abstract: A memory architecture for a video graphics controller includes a dynamic random access memory (DRAM), a static random access memory (SRAM) and a bus. The DRAM includes a data port, an address decoder that can receive an address to select a memory location in the DRAM and a command instruction bus that can receive instructions for data transfer. The SRAM includes a first data port to transfer data with the DRAM, a second data port to transfer data with other than the DRAM, a first address decoder that can receive an address to select a memory location in the SRAM for data transfer with the DRAM, a first read/write input that can receive a signal for data transfer with the DRAM, a second address decoder that can receive an address to select a memory location in a page of the SRAM to transfer data with other than the DRAM and a second read/write input that can receive a signal for data transfer from other than the DRAM.

Abstract: The invention is an improved method and apparatus for implementing the “least-recently-used” (LRU) replacement algorithm in a memory. A counter keeps count of the number of memory accesses. Each block in the memory is associated with a time tag that represents an approximation of the age in the memory. The criteria for updating a time tag is based upon the value of the counter and the time tag. The block with a time tag value representing the highest residence time in memory with respect to the other time tags is always replaced first. The time tag for the most recently accessed block is set to a value representing the least residence time in memory and the other time tags are updated based upon their age in the memory.

Abstract: A method for image enhancement for an interlaced display includes receiving a first group of pixels aligned about an axis, detecting a second group of pixels within the first group of pixels, each pixel of the second group of pixels having a luminous disparity between adjacent pixels less than a first threshold, determining whether each pixel within the second group of pixels is part of a line or edge, the determination including a comparison of luma or chroma disparities between neighboring pixels and filtering each pixel determined to be part of a line or edge.

Abstract: A method for arithmetic expression optimization includes receiving a first instruction defined for a first processor having a first base, the first instruction including an operator and at least one operand, converting the first instruction to a second instruction optimized for a second processor having a second base when all operands do not carry potential overflow or when the operator is insensitive to overflow, the second base being smaller than the first base, and converting to a wider base a third instruction that is the source of the overflow when the at least one operand the potential for overflow and when the operator is sensitive to overflow.