Patents Represented by Attorney John R. Ley, LLC
  • Patent number: 6586814
    Abstract: A shallow isolating trench is formed in a semiconductor wafer between active component areas to electrically isolate the active components from each other. The isolating trench is primarily formed of an insulating material, such as an oxide, in a recess formed into the wafer. An etch resistant material, such as BTBAS nitride, is placed over the insulating material in the recess. The etch resistant material protects the insulating material from erosion due to subsequent semiconductor fabrication process steps, so the integrity of the isolating trench and the planarity of the wafer are generally maintained.
    Type: Grant
    Filed: December 11, 2000
    Date of Patent: July 1, 2003
    Assignee: LSI Logic Corporation
    Inventors: Rajiv Patel, David Chan, Arvind Kamath, Ken Rafftesaeth, Venkatesh P. Gopinath
  • Patent number: 6586968
    Abstract: An order in which bits for serial data are transmitted or received by a first device, integrated circuit (IC) or logic, is programmable to be either from most significant bit (MSB) to least significant bit (LSB) or from LSB to MSB. Therefore, when the first device is used with a second device, integrated circuit (IC) or logic, which can handle the serial data in only one order, the first device is programmed, or configured, to handle the serial data in the same order as the second device.
    Type: Grant
    Filed: December 19, 2001
    Date of Patent: July 1, 2003
    Assignee: LSI Logic Corporation
    Inventors: Steven A. Schauer, David L. Schell
  • Patent number: 6576404
    Abstract: A carbon-doped hard mask includes a dielectric material containing carbon which is released from the hard mask during a metal etching process. The released carbon is deposited on and bonds to sidewalls of the metal structure during the metal etching process to passivate the sidewalls of the metal structure and prevent lateral etching of the sidewalls during the metal etching process. The released carbon also prevents accumulation of metal residue in open fields.
    Type: Grant
    Filed: December 19, 2000
    Date of Patent: June 10, 2003
    Assignee: LSI Logic Corporation
    Inventors: John Hu, Ana Ley, Philippe Schoenborn
  • Patent number: 6566730
    Abstract: A severable horizontal portion of a fuse link is formed relative to a vertically configured structure in an IC to promote separation of the severable portion upon applying energy from a laser beam. The vertically configured structure may be a reduced vertical thickness of the severable portion, an elevated lower surface of the severable portion above adjoining portions of the fuse link, a protrusion which supports the severable portion at a height greater than a height of the adjoining portions of the fuse link, flowing the melted severable portion down sloped surfaces away from a break point, and a propellent material beneath the severable portion which explodes to ablate the severable portion.
    Type: Grant
    Filed: November 27, 2000
    Date of Patent: May 20, 2003
    Assignee: LSI Logic Corporation
    Inventors: Gary K. Giust, Ruggero Castagnetti, Yauh-Ching Liu, Shiva Ramesh
  • Patent number: 6557566
    Abstract: A drum washer has a base, a barrel support structure, and a water delivery system. A hollow drum is turned over and placed on the drum washer by inserting a spray head of the water delivery system through a hole in a top cover of the drum and into the interior of the drum. The barrel support structure holds the drum at a fixed angle while water is sprayed from the spray head onto interior surfaces of the drum. The water rinses the interior surfaces of the drum and drains out the hole in the top cover of the drum.
    Type: Grant
    Filed: October 16, 2000
    Date of Patent: May 6, 2003
    Assignee: LSI Logic Corporation
    Inventor: Don Rudolfs
  • Patent number: 6553511
    Abstract: Sequence number metadata which identifies an input/output (I/O) operation, such as a full stripe write on a redundant array of independent disks (RAID) mass storage system, and revision number metadata which identifies an I/O operation such as a read modify write operation on user data recorded in components of the stripe, are used in an error detection and correction technique, along with parity metadata, to detect and correct silent errors arising from inadvertent data path and drive data corruption. An error arising after a full stripe write is detected by a difference in sequence numbers for all of the components of user data in the stripe. An error arising after a read modify write is detected by a revision number which occurred before the correct revision number.
    Type: Grant
    Filed: May 17, 2000
    Date of Patent: April 22, 2003
    Assignee: LSI Logic Corporation
    Inventors: Rodney A. DeKoning, Thomas L. Langford, II, Scott E. Greenfield
  • Patent number: 6521549
    Abstract: A relatively thin gate insulator of a digital switching transistor is formed from a layer of silicon oxynitride which was initially formed by implanting nitrogen atoms in a silicon substrate and oxidizing the nitrogen and silicon. It has been discovered that an outer layer of silicon dioxide is formed as a part of the silicon oxynitride layer. Removing this outer layer of silicon dioxide from the silicon oxynitride layer leaves a thin remaining layer of substantially-only silicon oxynitride as the gate insulator. Thinner gate insulators of approximately 15-21 angstroms, for example, can be formed from a grown thickness of 60 angstroms, for example. Gate insulators for digital and analog transistors may be formed simultaneously with a greater differential in thickness been possible by using conventional nitrogen implantation techniques.
    Type: Grant
    Filed: November 28, 2000
    Date of Patent: February 18, 2003
    Assignee: LSI Logic Corporation
    Inventors: Arvind Kamath, Rajiv Patel, Ravindra M. Kapre
  • Patent number: 6504202
    Abstract: A metal-insulator-metal capacitor is embedded in an interconnect layer of an integrated circuit (IC). The interconnect layer has a cavity, and the capacitor is formed in the cavity with one of the plates of the capacitor integral with a conductive layer of the interconnect layer, so the capacitor plate electrically communicates with the interconnect layer. The interconnect layer has multiple conductive layers, including a layer, such as aluminum, that is subject to deformation at certain temperatures during fabrication of the IC, and the cavity extends through this layer. A remaining conductive layer of the interconnect layer defines one of the capacitor plates, and a dielectric layer and another capacitor plate are formed thereon within the cavity. Via interconnects of about the same length electrically connect to the top plate and through the interconnect layer to the bottom plate.
    Type: Grant
    Filed: February 2, 2000
    Date of Patent: January 7, 2003
    Assignee: LSI Logic Corporation
    Inventors: Derryl D. J. Allman, Kenneth Fuchs
  • Patent number: 6498890
    Abstract: The subject matter described herein involves a connector cable, particularly for use in a computerized storage system, such as Fibre Channel. The connector cable generally connects together a storage device, a power supply and an optical cable through which optical signals are transferred. A media interface adapter connects between the connector cable and the optical cable and receives electrical power from the power supply through the connector cable to convert the optical signals to electrical signals and vice versa. Using a plurality of the connector cables with or without a connection to the power supply, a plurality of the storage devices may be chained together.
    Type: Grant
    Filed: July 2, 2001
    Date of Patent: December 24, 2002
    Assignee: LSI Logic Corporation
    Inventor: Michael D. Kimminau
  • Patent number: 6480970
    Abstract: Data consistency is verified between geographically separated and connected active and mirroring data processing systems by creating metadata which describes user data, such as a cyclical redundancy code (CRC), and time stamp information which describes the time at which user data was first stored on the active system. The metadata and the time stamp information sent from the active system is compared at the mirroring system with the time stamp information and metadata read from the mirroring system. Upon detecting a discrepancy when comparing the metadata from the active and mirroring systems, the user data from the active or mirroring system which is less current temporally, as determined by the time stamp information, is replaced by the user data from the other one of the active or mirroring systems having the more current temporal time stamp information.
    Type: Grant
    Filed: June 7, 2001
    Date of Patent: November 12, 2002
    Assignee: LSI Logic Corporation
    Inventors: Rodney A. DeKoning, Thomas L. Langford, II
  • Patent number: 6480643
    Abstract: An optical waveguide extends vertically within the interior of an IC-like structure to route optical signals between horizontal waveguides in different layers of horizontal optical interconnects. A light reflecting structure is positioned at the intersection of the horizontal and vertical waveguides to reflect the light. Multiple horizontal waveguides may join the vertical waveguide at a common intersection, to form a beam splitter or a beam combiner. Optical signals from one horizontal waveguide are diverted within the IC-like structure into another horizontal or vertical waveguide. The waveguide is formed with a light reflective structure at an intersection of the horizontal and vertical waveguides, and the waveguide is completed using damascene fabrication techniques.
    Type: Grant
    Filed: September 6, 2001
    Date of Patent: November 12, 2002
    Assignee: LSI Logic Corporation
    Inventors: Derryl D. J. Allman, Verne C. Hornbeck
  • Patent number: 6461972
    Abstract: A dual plasma process generates a microwave neutral plasma remote from a semiconductor wafer and a radio frequency (RF) ionized plasma adjacent to the wafer for simultaneous application to the wafer. A first gas flows through a microwave plasma generation area, without a second gas in the gas flow, to generate the neutral microwave plasma. The second gas is added to the gas flow downstream of the microwave plasma generation area prior to an RF plasma generation area.
    Type: Grant
    Filed: December 22, 2000
    Date of Patent: October 8, 2002
    Assignee: LSI Logic Corporation
    Inventor: Alex Kabansky
  • Patent number: 6441419
    Abstract: An integrated circuit includes a vertical-interdigitated capacitor located between an upper interconnect layer and a lower interconnect layer. Both interconnect layers include conductors formed of a metal capable of atom diffusion or ion migration, such as copper. The capacitor plates contact an interconnect layer conductor to create barrier layers to prevent atom diffusion or ion migration from the conductors at the contact locations. Additional barrier layers contact the conductors at locations other than where the capacitor plate portions contact the conductors, and the additional barrier layers are preferably formed of the same material and at the same time that one of the plates is formed. The integrated circuit may include a via plug interconnect extending between conductors of upper and lower interconnect layers, with a plug barrier layer surrounding the plug material to prevent atom diffusion or ion migration from the plug material.
    Type: Grant
    Filed: March 15, 2000
    Date of Patent: August 27, 2002
    Assignee: LSI Logic Corporation
    Inventors: Gregory A. Johnson, Kunal Taravade, Gayle Miller