Abstract: A device extractor for extracting devices from a hierarchical cell design. The device extractor selects a cell from the lowest level of the hierarchy and searches the cell for the device components. The device extractor searches each cell in the lowest level and then selects a "parent" cell in the penultimate level. The parent cell, and all of the children cells of the parent cell, are searched. The selection and search process continues until all of the components of the device are identified in a cell or the children cell of the cell and a proper relationship between the components is determined. The components of the identified device are masked so that they are not identified and associated with another device during subsequent searches.

Abstract: A ratiometric Fourier analyzer is provided for determining the frequency components of the output waveforms of electronic circuits by eliminating errors due to aliasing without increasing the time necessary for analysis. Ratiometric Fourier analyzers in accordance with the present invention detect values of an output waveform from a circuit simulator at time intervals selected according to features of the output waveform being analyzed. A functional representation of the output waveform over each interval is generated using a polynomial fit to the detected values of the waveform, and a Fourier integral for each frequency of interest is calculated for interval using the functional representation of the waveform. The Fourier integrals are then summed over the intervals of the output waveform to yield the Fourier coefficient at a given frequency for the output waveform.

Abstract: A method is disclosed for deriving code schedule sequences for a target code generator from an input ordering of nodes and prime factors of their respective ordered invocation rates from an SDF graph representative of a system. The method involves first creating a loop set for each prime factor wherein the elements of each loop set are the actors, the invocation frequency from which are factorable by that prime factor and are ordered. The redundant created loop sets are merged so as to eliminate those sets with identical nodes. The merged loop sets are then sorted in decreasing order by the total number of node elements in each set. A determination is then made as to whether each loop set is a proper subset of its sorted ordered predecessor loop set with which it intersects and, if not, then breaking the non-disjoint sets into sublists of sets which are proper subsets of their predecessor sets and then determining whether the parent sets of the broken sublists are then disjoint from one another.