Abstract: An training collar for conditioning the behavior of an animal employs a radio transmitter in conjunction with a microprocessor-based receiver unit mounted on the collar to provide enhanced control over the level of electrical stimulation delivered to the animal through collar mounted electrodes. The transmitter generates control signals including a stimulation level code, and a detector in the receiver unit extracts the stimulation level codes from the control signal and couples them to the microprocessor. The microprocessor implements a control program to generate trains of voltage pulses having widths determined by the stimulation level code. The generated train of voltage pulses control current flow in a transformer based power delivery circuit to generate voltage pulses at the collar electrodes having peak to peak voltages determined by the widths of the voltage pulses in the generated voltage pulse train.

Abstract: A system and method for transferring data between clock domains operating at substantially the same frequency continuously compares the relationship between a delayed data phase signal driven by a non-delayed source domain clock and a data phase signal sampled by a delayed receiving domain clock. The result of the comparison determines along which one of multiple data paths within the synchronizing circuit the transfer of the data frame will take place. Several data paths with different delays (at least two) transfer the data frame and clock signals. An XNOR comparator responds to the relationship between a delayed data phase signal driven by a non-delayed source domain clock and a data phase signal sampled by a delayed receiving domain clock to determine which one of the multiple data paths transfers the data frame.

Abstract: The system and method improves Electronic Design Automation practices by creating a data template representing pins, elements, and dependencies for numerous components in the same functional class. A pin having the same function is represented once on the data template even if the pin name is different. Sequences of component pins having the same function are combined and are represented by a single pin on the data template. The performance of functional logic symbol generation systems increases significantly because the data template enables the creation of functional logic symbols to be accomplished quickly, accurately, and consistently.

Abstract: The kiln with displaceable frames, designed to contain also manufactured articles of considerable mass avoiding any direct contact between them and the motor rollers which causes thickenings, is provided with a formation of short transverse, non-through, rollers (22), distributed in two opposite rows to define at least one plate of transport, said rollers extending in an overhanging manner towards the inside of the lateral walls of the kiln; a loading frame (28), rectangular or square, constituted by a pair of stringers (29) connected rotationally to the internal ends of said rollers and interconnected by transverse elements (30) for supporting the manufactured articles to be treated, is introduced into the kiln and guided by lateral surfaces; the kiln is used in industries in which drying or firing of manufactured articles, for instance ceramic articles such as sanitary apparatus, is made.

Abstract: A programmable and adaptive electronic filter for filtering digital signals. The filter uses a table which contains the outputs corresponding to all possible inputs, so that the filter may be constructed of memory, adders and multiplexers, and does not require multipliers. The input sample is used as an address to determine the location in the memory which contains the output corresponding to that input. The table of outputs is placed in a particular order such that the change between the inputs corresponding to each two adjacent locations is a single digit, thus allowing the table to be easily calculated, since the difference between the outputs in those two locations is two times the weighting coefficient for the digit in the input which is changed. Adaptive filtering is accomplished by using a second filter which has as its input the difference between the actual output of the filter and the desired output, and as its output changes to the weighting coefficients of the filter.

Abstract: Data processing apparatus for executing successive data processing instructions comprises a processing core having a current operational state selected from a predetermined set of possible operational states, the current operational state being defined by a control state signal supplied to the core; a synchronous state machine circuit for generating an output state signal, indicating a provisionally valid next operational state of the core, in response to a predetermined phase of a current clock cycle of a clocking signal, the output state signal being dependent upon a current operational state of the core and control signals generated by the core before the predetermined phase of the current clock cycle indicative of a next data processing instruction to be executed by the core; and an asynchronous logic circuit for generating the control state signal in response to the output state signal and late control signals received after the predetermined phase of the current clock cycle.

Abstract: A system for model-based verification of local design rules comprises a processing unit, a verification database wherein a cell reference graph representing an integrated circuit design as a hierarchical collection of cells is stored, a verification function memory wherein a verification function is stored, a friendly worklayer memory, and an unfriendly worklayer memory. Each cell can include shape models and references to lower-level cells. The processing unit first verifies each cell in the cell reference graph that does not reference any lower-level cells, after which the processing unit verifies each cell for which all lower-level cells referenced have been previously verified. During the verification of a selected cell, the processing unit determines whether models in the selected cell interact with other models in the selected cell or with any lower-level cell. Interacting models are referred to as being "unfriendly," and non-interacting models are referred to as being "friendly.

Abstract: An iterative multiplier having a multiplier core generating partial results upon each iteration. When an early terminate of a multiply instruction occurs, at least one of the partial results is passed to a general purpose barrel shifter for bit realignment dependent upon the number of iterations performed before the early terminate occurred. The bit realigned partial results are then passed to an arithmetic logic unit where they are added to yield the final result.

Abstract: A system and method for detecting the voltage level of a power supply signal and generating a notification signal to indicate when the supply voltage exceeds a minimum voltage that is programmable by a user. A programming signal, that allows for multiple voltages to be detected, is applied to the voltage detection system to generate a notification signal in response to the supply voltage attaining the minimum voltage indicated by the programming signal.

Abstract: A combination electric torch that utilizes a swivelable headlamp portion (2) that in its first position can project light forward of the body portion (1) of the torch and in its second position can project light onto a warning reflector (7), in which second position the torch may be used as a warning lamp (3). An arm (5) is provided on the body portion (1) of the torch which has a rotatable cover (10) for protecting an auxiliary lamp (11), such as fluorescent tube, from damage. Because the headlamp portion (2) can be swiveled to a safe position adjacent the warning reflector (7) the design comprises a rugged construction less susceptible to damage but can be used in a variety of ways such as that of a warning lamp, conventional flashlight and reading light.

Abstract: A system and method efficiently locates program features in a menu-oriented software program. The system and method enable a user to locate a feature in a menu-based program by flattening the hierarchy without requiring prior knowledge of the terms used in the menu-oriented program or the menu structure. Additionally, the system and method permit the user to customize the system by inputting user-defined terms and features and associating the terms with a particular feature.

Abstract: A data stream processing unit comprises a CPU which comprises an ALU, a shift/extract unit, timers, a scheduler, an event system, a plurality of sets of general purpose registers, a plurality of sets of special purpose registers, masquerade registers, pipeline controller, a memory controller and a pair of internal buses. The multiple sets of general and special purpose registers improves the speed of the CPU in switching between environments. The pipeline controller, the scheduler, the events system, and the masquerade registers facilitate the implementation and execution of the methods of the present invention such as efficient thread scheduling, branch delays, elimination of delay slots after stores that provide further increases in the performance and bandwidth.

Abstract: An electrical component model generator generates, stores, and retrieves component models in a component model library. Component models comprise property values. A property value quantifies a property. Properties are associated with a plurality of component models. The component model generator generates rules. A rule is a relationship between two or more properties. A rule applied to two or more properties associated with the component model define a property value for at least one of these properties. Properties that are not defined by rules or that have a value different from the value generated by a rule are quantified by an exception value that is input by a user. The component model generator stores the component models by storing the rules for all component models and the exception values for each component model. Generating and maintaining the component model library is facilitated by automatically applying the rules to the component model to generate some or most of the property values.

Abstract: A pipeline processor 2 having an associated branch cache 4 is provided. Each cache line 12 of the branch cache stores a cache TAG, a next branch data value R, a target address value TA and a target instruction value TI. The next branch data value indicates when the next branch instruction will be encountered in the stream of instructions fed to the pipeline processor. This data is used such that following a branch cache hit, no further reading of the branch cache is made until the next branch data indicates that the next branch instruction should have been reached. At this stage, the branch cache 4 is read to see if it contains corresponding data for that next branch instruction that will avoid the need to decode that next branch instruction before instructions from the target address of that branch instruction can be fed into the pipeline. The avoiding of the need to read the branch cache for every instruction fed into the pipeline saves power.

Abstract: A computer-aided engineering (CAE) tool simulates physical floor-planning of electronic components to be placed and interconnected on both sides of a printed circuit board (PCB). Initially components are placed in a raw portion of the PCB, until an evaluator determines where to re-place selected components in refined portions on both sides of the PCB. The evaluation process is repeated until all components are selected from the raw portion and re-placed in a refined portion. During evaluation, a profile of the raw portion is generated, and the generated profile is searched for a location for placing each selected component.

Abstract: A method is disclosed whereby systems having bidirectional and/or multiplicatively driven data paths are statically scheduled for simulation. The method flattens the netlist to convert bidirectional data flow paths into unidirectional, multiplicatively driven data paths. All drivers connected to multiplicatively driven data paths (or nets) are isolated from the net using a bus resolution block. The bus resolution block implements a resolution function which permits the system to be statically scheduled for simulation. Simulation speed is increased substantially thereby.