Abstract: Circuitry for preventing damage to differentially coupled input JFETs in an integrated circuit amplifier includes first (J2) and second (J4) differentially coupled input JFETs. A first input signal (Vin+) is applied to a gate of the first input JFET (J2), and second input signal (Vin?) is applied to a gate of the second input JFET. Needed amounts of drain current are supplied to the first and second input JFETs. A separator JFET (J1) having a drain coupled to a source of the first input JFET and a source coupled to the source of the second input JFET is operated to control an amount of electrical isolation between the drain and source of the separator JFET so as to limit an amount of reverse bias voltage across a gate-source junction of one of the first and second input JFETs to a value less than a gate-source junction breakdown voltage of that the first and second input JFETs.