Patents Represented by Attorney Jon P. Busack
  • Patent number: 5033834
    Abstract: Apparatus to convert a single-mount SEM microscope stage into a multi-mount SEM microscope stage. The apparatus interfits onto the conventional center-aperture SEM microscope stage, and provides a mounting face having apertures for multiple-specimen mounts. The device is able to provide top or side views of the specimen with only a 45.degree. rotation of the microscope stage from its starting point.
    Type: Grant
    Filed: January 30, 1989
    Date of Patent: July 23, 1991
    Assignee: Micron Technology, Inc.
    Inventors: Loren D. Corder, Burgess G. Gudmundson
  • Patent number: 4961232
    Abstract: An underhood includes a helmet portion and a mask portion. The helmet portion consists of a loosely fitted bonnet which is attached to an elastic lower section. The elastic fabric (two-way stretch) substantially surrounds the bottom of the headdress in the manner of a headband, but is open below that location. A face mask secures the lower section around the user's face. The face mask is made of highly breathable fabric and relies on the elasticity of the stretch fabric in the lower part of the helmet portion for elastic fit around the user's face. Therefore, the face mask is relatively inelastic, while permitting elastic fit around the face.
    Type: Grant
    Filed: June 26, 1989
    Date of Patent: October 9, 1990
    Assignee: Micron Technology, Inc.
    Inventor: David A. Hulsey
  • Patent number: 4958091
    Abstract: A voltage level conversion circuit which may be used on CMOS integrated circuit semiconductor devices uses a regulated power supply to drive an internal array and periphery logic. The voltage converter includes a first inverter (31), an isolating transistor (Q3), and an output inverter (35). An isolating transistor (Q3) admits current to the output inverter (35) until the output inverter (35) switches its output level. An active biasing circuit, including transistor Q4, causes inverter (35) to remain at a low state after the isolating transistor (Q3) gates off, thereby allowing the output inverter to continue to provide its output in isolation from the first inverter's output voltage.
    Type: Grant
    Filed: June 6, 1988
    Date of Patent: September 18, 1990
    Assignee: Micron Technology, Inc.
    Inventor: Gregory N. Roberts
  • Patent number: 4949161
    Abstract: An improved interdigitized leadframe strip having a pair of rail stubs coextensive with the exposed pins of the leadframes at either end of the strip, which can still be stamped from a continuous strip without any waste of material between the individual strips. The split rail stubs are still considerably wider than the exposed pins of the end leadframes and hence, offer considerable protection to the exposed pins from mechanical damage.
    Type: Grant
    Filed: December 23, 1988
    Date of Patent: August 14, 1990
    Assignee: Micron Technology, Inc.
    Inventors: Timothy J. Allen, Alan G. Wood
  • Patent number: 4944446
    Abstract: A method and apparatus for feeding preform wire into a preform dispenser, cutting a piece of preform, transferring the preform to a location over an integrated circuit ceramic package, and placing the preform in the package prior to placing and attaching a die in the ceramic package.
    Type: Grant
    Filed: November 2, 1989
    Date of Patent: July 31, 1990
    Assignee: Micron Technology, Inc.
    Inventor: Ted L. Thompson
  • Patent number: 4943148
    Abstract: A holder for positioning silicon wafers on a microscope stage for uniform and repeatable viewing under the microscope. The holder comprises a circumferential rib having an arc of from about 60.degree.-180.degree. diametrically opposed to a radially aligned slit within which a bracket member is positioned. Actuation of the bracket member pushes against a major flat on the silicon wafer, causing the leading edge of the wafer to bear against the abutment. The holder, or platen, is provided with calibration standards on a circumferential edge portion, and is also provided with at least one access port permitting access to the underside of the wafer with vacuum wands.
    Type: Grant
    Filed: October 20, 1988
    Date of Patent: July 24, 1990
    Assignee: Micron Technology, Inc.
    Inventors: Carl W. Mondragon, David A. Sperry
  • Patent number: 4942576
    Abstract: Apparatus for comparing outputs of two digital devices and counting digital aberrations between them. One embodiment of this invention is the use of an XOR gate to compare the output of a DRAM under test to the output of a known good DRAM of corresponding operating characteristics, and the use of a counter to count the digital aberrations, known as badbits, between the two DRAMs.
    Type: Grant
    Filed: October 24, 1988
    Date of Patent: July 17, 1990
    Assignee: Micron Technology, Inc.
    Inventors: Jon P. Busack, Gary M. Johnson, Richard R. Clem
  • Patent number: 4924442
    Abstract: A voltage sensing circuit is used to rapidly pull up a high potential node of a reference array to a value of a high potential source reduced by a threshold voltage (V.sub.CC -V.sub.T). During an enable cycle, the high potential node is precharged to a potential of V.sub.CC -V.sub.T, which turns on a transistor gated to the V.sub.CC potential. This pulls the high potential node as rapidly as possible to a high level in order to speed up the sensing process. A potential maintenance circuit provides sufficient current from the high potential source to maintain a desired potential at the high potential node.
    Type: Grant
    Filed: September 30, 1988
    Date of Patent: May 8, 1990
    Assignee: Micron Technology, Inc.
    Inventors: Zhitong Chen, Gary M. Johnson, Ward D. Parkinson, Wen-Foo Chern, Tyler A. Lowrey, Thomas M. Trent
  • Patent number: 4924119
    Abstract: A circuit having both p-channel and n-channel transistors is made programmable by providing the p-channel transistor with a floating gate which is in electrical continuity with a floating gate which is in electrical continuity with a floating gate on the n-channel transistor. In order to compensate for over-deprogramming, the circuit includes transistor which shunt the programmable transistors when the transistors are over-deprogrammed.
    Type: Grant
    Filed: September 13, 1988
    Date of Patent: May 8, 1990
    Assignee: Micron Technology, Inc.
    Inventor: Ruojia Lee
  • Patent number: 4915597
    Abstract: Valve and channeling improvements in a filter pump head assembly used for dispensing photoresist in a semiconductor manufacturing facility.
    Type: Grant
    Filed: December 19, 1988
    Date of Patent: April 10, 1990
    Assignee: Micron Technology, Inc.
    Inventor: Scott E. Moore
  • Patent number: 4914631
    Abstract: A memory array (e.g., DRAM) is provided with a potential maintenance circuit which provides sufficient current to maintain a high potential node of the memory array at a predetermined potential. The potential maintenance circuit is gated ON after receipt of a clock signal and gated OFF at the predetermined potential. This permits the high voltage node to be maintained, while reducing current requirements. The invention is particularly useful when used in conjunction with a circuit which rapidly pulls up the high node to a value of V.sub.CC -V.sub.T (where VT is a threshold voltage of a transistor).
    Type: Grant
    Filed: September 30, 1988
    Date of Patent: April 3, 1990
    Assignee: Micron Technology, Inc.
    Inventors: Gary M. Johnson, Zhitong Chen, Wen-Foo Chern, Ward D. Parkinson, Tyler A. Lowrey, Thomas M. Trent
  • Patent number: 4899107
    Abstract: A reusable burn-in/test fixture for discrete TAB die consists of two halves. The first half of the test fixture is a die cavity plate for receiving semiconductor dice, and contains cavities in which die are inserted. The second half establishes electrical contact with the dice and with a burn-in oven. The test fixture need not be opened until the burn-in and electrical test are completed. After burn-in stress and electrical test, the die are removed from the test fixture and depositioned accordingly. The technique will allow all elements of the burn-in/test fixture to 100% reusable.
    Type: Grant
    Filed: September 30, 1988
    Date of Patent: February 6, 1990
    Assignee: Micron Technology, Inc.
    Inventors: Tim J. Corbett, Alan G. Wood
  • Patent number: 4892122
    Abstract: Apparatus generally for bending wire and particularly for bending and aligning probe pins. The preferred embodiments consists of a small diameter stiff wire with one end formed into a small closed loop, and the other end attached to a handle.
    Type: Grant
    Filed: December 19, 1988
    Date of Patent: January 9, 1990
    Assignee: Micron Technology Inc.
    Inventor: John M. Ickes
  • Patent number: 4881487
    Abstract: A fluid level sensor is provided in a fluid dispensing system, primarily in a photoresist dispensing system used in a semiconductor manufacturing process. A bubble is introduced into the fluid shortly before fluid supply is emptied, said bubble being used to detect a low fluid level. The invention uses a snap-on combination cap and pickup tube, the pickup tube having a small hole near its lower tip, and the cap containing an optical bubble detector.
    Type: Grant
    Filed: November 21, 1988
    Date of Patent: November 21, 1989
    Assignee: Micron Technology Inc.
    Inventor: Scott E. Moore