Patents Represented by Attorney, Agent or Law Firm Jonathan Harris
  • Patent number: 6366290
    Abstract: A software graphics engine includes a selectable mode filter for improved texture mapping. An x, y pixel coordinate is mapped into a u, v texture map. The mapped u, v coordinate includes integer and fractional portions. Depending on the location of the coordinate relative to the four nearest texels, which are represented as integers, one of several texture mapping schemes are used to either select or calculate the texel value to be used to render the pixel at the x, y screen location. The three texture mapping schemes include point sampling in which the nearest texel from the texture map is selected, two-texel averaging in which the closest two texels are combined in a weighted average, and four-texel averaging in which the closest four texels are combined in a weighted average. By providing a selectable filter than can perform point sampling or two or four-texel averaging, the speed benefit of point sampling can be approached as well as the superior quality of two- and four-texel averaging.
    Type: Grant
    Filed: March 30, 1998
    Date of Patent: April 2, 2002
    Assignee: Cirrus Logic, Inc.
    Inventors: Thomas Anthony Dye, Gautam P. Vaswani, Daniel P. Wilde
  • Patent number: 6169502
    Abstract: A pipelined analog-to-digital converter (ADC) is calibrated to enable production of an n-bit digital output representing an n-2 bit binary word, where “n” is a selected large positive integer, for example without limitation on the order of ten (10). In an analog-to-digital converter (ADC) having a plurality stages, each stage includes a stage input connection, a stage output connection, and a capacitor circuit including first and second predetermined capacitors (C1 and C2) and a variable capacitance calibration capacitor (Ccal). The first and second capacitors and the variable capacitance calibration capacitor are connected to each other at a capacitor common node. An amplifier input connection is connected to a capacitor common node. A comparator input connection (CIC) is connected to a stage input connection. A track and hold circuit (THC) is coupled to an amplifier output connection, and a source follower circuit (SF) is connected to a stage output connection.
    Type: Grant
    Filed: May 8, 1998
    Date of Patent: January 2, 2001
    Assignee: Cirrus Logic, Inc.
    Inventors: Sandra Marie Johnson, David R. Welland