Abstract: In the design of digital integrated circuits, it is often desirable to formally verify whether an implementation design is equivalent to a reference design. The present invention facilitates such formal verification by determining “necessary correspondences” between inputs or outputs of the two circuits to be compared for equivalency. Necessary correspondences are so called because while they establish necessary conditions for equivalency to occur, they are not sufficient to determine that equivalency actually exists. Once such necessary correspondences have been determined, algorithms to determine actual equivalency can be more strategically applied. It is often cost-effective (i.e. more efficient), as part of an equivalency-determining circuit design tool, to first apply the teachings of the present invention in order to lessen subsequent application of an equivalency determining method.