Patents Represented by Attorney Joscelyn G. Cockburn
  • Patent number: 7352755
    Abstract: A Network Interface Card (NIC) for attaching data terminal equipment to a communications network. The NIC includes a Phase Lock Loop (PLL) with a master delay structure that is operatively coupled to at least one delay line structure. The PLL generates control pulses at precise delayed intervals that are used to gate data through said at least one delay line structure.
    Type: Grant
    Filed: June 17, 2003
    Date of Patent: April 1, 2008
    Assignee: International Business Machines Corporation
    Inventors: Hayden Clay Cranford, Jr., Raymond Paul Rizzo
  • Patent number: 7349342
    Abstract: Methods and apparatus are provided for metering data packets having a plurality of different packet lengths in a data communications network. A token count TC is incremented at a token increment rate CIR subject to an upper limit CBS on the token count. On arrival of a packet of length L tokens, it is determined if both TC>0 and TC+n?L, where n is a defined number of tokens. If so, the data packet is categorized as in profile and L tokens are subtracted from the token count TC. Otherwise the data packet is categorized out of profile. In some embodiments, n is set to a value in the range 0<n<(Lmax?1) where Lmax is the maximum length of data packets to be metered. In other embodiments, n is varied in the range 0?n?(Lmax?1) in dependence on at least one feedback signal indicating an operational condition in the network. The degree of conformance of the metering system is determined by the parameter n, whereby the conformance level can be tuned to particular multi-length packet environments.
    Type: Grant
    Filed: March 17, 2003
    Date of Patent: March 25, 2008
    Assignee: International Business Machines Corporation
    Inventors: Brian E. Carpenter, Clark D. Jeffries, Andreas Kind
  • Patent number: 7346062
    Abstract: A system that indicates which frame should next be removed by a scheduler from flow queues within a network device, such as a router, network processor, and like devices is disclosed. The system includes a search engine that searches a set of calendars under the control of a Finite State Machine (FSM), a current pointer, and input signals from an array and a clock line providing current time. Also included is a decision block that determines which of the searches are critical and which, during peak calendar search periods, can be postponed with minimal impact to the system. The postponed searches are then conducted at a time when there is available calendar search capacity.
    Type: Grant
    Filed: July 10, 2003
    Date of Patent: March 18, 2008
    Assignee: International Business Machines Corporation
    Inventors: Bryan K. Bullis, Darryl J. Rumph, Michael S. Siegel
  • Patent number: 7324460
    Abstract: A method for controlling the flows of data packets that are switched or routed at nodes of high-speed communication networks is disclosed. According to the invention, resource metering units are assigned to resources shared between devices of the switch or router e.g., shared memories or link bandwidths. When the occupancy of a shared resource reaches a predetermined threshold, an event is generated and transmitted to devices sharing this resource. Furthermore, a periodic refresh of the overall flow control information is performed so that lost events are, however, eventually acted on. Thus, a new device may become active without perturbing the active flows after having gathered enough flow control information.
    Type: Grant
    Filed: September 29, 2003
    Date of Patent: January 29, 2008
    Assignee: International Business Machines Corporation
    Inventors: Rene Gallezot, Rene Glaise, Francois Le Maut
  • Patent number: 7284260
    Abstract: A bit vector array apparatus provides a high speed method for processing network transmission controls. Complex data structures for controlling network access are represented in the simplest possible form as single bit vector elements. The bit vector elements are combined into bit vectors comprised of 32 single bit vector elements. The bit vectors are processed in parallel in the bit vector array apparatus, which is comprised of special-purpose bit manipulation functions to expedite the processing.
    Type: Grant
    Filed: January 31, 2003
    Date of Patent: October 16, 2007
    Assignee: International Business Machines Corporation
    Inventors: Paul John Hilts, Brian Alan Youngman
  • Patent number: 7268624
    Abstract: Offset voltages in differential amplifiers are minimized by controlling compensation currents through the load impedances of the amplifiers. The currents are varied while sensing the polarity of the offset voltage. When the polarity changes, the current values are latched to keep the offset voltage at a minimum.
    Type: Grant
    Filed: August 15, 2005
    Date of Patent: September 11, 2007
    Assignee: International Business Machines Corporation
    Inventors: Minhan Chen, Westerfield John Ficken, Louis Lu-Chen Hsu, Steven J. Zier
  • Patent number: 7260062
    Abstract: Methods and apparatus are provided for controlling flow rates of a plurality of data packet flows into a queue 4 corresponding to a resource 3 of a network device 1. The flows comprise a set 7 of non-responsive flows, and a set 8 of other flows which may comprise responsive flows and/or flows whose responsiveness is unknown. The flow rates are managed in accordance with a queue management scheme such that adjustments are made to each flow rate in dependence on excess bandwidth in the resource, the amounts of the adjustments being dependent on one or more adjustment parameters for each flow. An error signal is generated based on the deviation from a desired allocation ratio of the ratio of the total flow rates into the queue 4 for the sets of flows 7, 8. At least one adjustment parameter for at least one flow is then varied in dependence on the error signal in such a manner as to reduce the aforementioned deviation.
    Type: Grant
    Filed: December 20, 2002
    Date of Patent: August 21, 2007
    Assignee: International Business Machines Corporation
    Inventors: Hoyt Edwin Bowen, Jr., Patrick Droz, Clark D. Jeffries, Lukas Kencl, Andreas Kind, Soenke V. Mannal, Roman A. Pletka
  • Patent number: 7257616
    Abstract: A network switch apparatus, components for such an apparatus, and methods of operating such an apparatus in which data flow handling and flexibility is enhanced by the cooperation of a control point and a plurality of interface processors formed on a semiconductor substrate. The control point and interface processors together form a network processor capable of cooperating with other elements including an optional switching fabric device in executing instructions directing the flow of data in a network.
    Type: Grant
    Filed: June 14, 2005
    Date of Patent: August 14, 2007
    Assignee: International Business Machines Corporation
    Inventors: Brian Mitchell Bass, Jean Louis Calvignac, Anthony Matteo Gallo, Marco C. Heddes, Sridhar Rao, Michael Steven Siegel, Brian Alan Youngman, Fabrice Jean Verplanken
  • Patent number: 7168039
    Abstract: A method and system for reducing an amount of horizontal space required when displaying a plurality of columns on a display screen is disclosed. The at least one column of the plurality of columns has at least one entry containing text data. The method and system include obtaining the at least one entry from the at least one column, and abbreviating a width of the at least one entry, determining if there is another entry containing text data. The method and system further include repeating the steps of obtaining the at least one entry, abbreviating the at least one entry and determining if there is another entry until all of the at least one entries are abbreviated. The method and system further include displaying the at least one column having the at least one abbreviated entry.
    Type: Grant
    Filed: June 2, 1998
    Date of Patent: January 23, 2007
    Assignee: International Business Machines Corporation
    Inventor: Randal Lee Bertram
  • Patent number: 7161961
    Abstract: The present invention relates to a device for combining at least two data signals having an input data rate into a single data stream having an output data rate being higher than the input data rate for transmission on a shared medium or vice versa, particularly, to a single SDH/SONET framer capable of handling a large range of SDH/SONET frames from STM-i to STM-j with an aggregated total capacity corresponding to an STM-j frame where i and j are integers in the range from 1 to 64 or higher according to the STM-N definition of the SDH/SONET standards. More over, the present invention can also be extended to work with STS-1 as lowest range. STS-1 exists in SONET only not SDH and corresponds to a data rate of 51.5 Mb/s a third of the 156 Mb/s of STM-1.
    Type: Grant
    Filed: June 13, 2001
    Date of Patent: January 9, 2007
    Assignee: International Business Machines Corporation
    Inventors: Kenneth James Barker, Rolf Clauberg, Jean Louis Calvignac, Andreas Guenther Herkersdorf, Fabrice Jean Verplanken, David John Webb
  • Patent number: 7149269
    Abstract: A receiver for clock and data recovery includes n sampling latches (SL1 . . . SLn) for determining n sample values (SV1 . . . SVn) of a reference signal (Ref2) at n sampling phases (?1a . . . (?na) having sampling latch inputs and sampling latch outputs. The receiver further includes a phase position analyzer (5) connected to the sampling latch outputs for generating an adjusting signal (AS) for adjusting the sampling phase (?1a . . . ?na), if the sample value (SV1 . . . SVn) deviates from a set point and a phase interpolator (9) for generating sampling phases (?1u . . . ?nu). A sampling phase adjusting unit (6) connected with its inputs to the phase position analyzer (5) and the phase interpolator (9) and with its outputs to the sampling latches (SL1 . . . SLn) is provided for generating adjusted sampling phases (?1a . . . ?na) depending on the sampling phases (?1u . . . ?nu) and said adjusting signal (AS).
    Type: Grant
    Filed: February 27, 2003
    Date of Patent: December 12, 2006
    Assignee: International Business Machines Corporation
    Inventors: Hayden C. Cranford, Jr., Vernon R. Norman, Martin Schmatz
  • Patent number: 7149749
    Abstract: A technique is provided to either insert or delete a leaf in a Patricia tree having a direct table and a plurality of PSCB's which decode portions of the pattern of a leaf in the tree without shutting down the functioning of the tree. A leaf having a pattern is identified as either a leaf to be inserted or deleted. Using the pattern, the tree is walked once to identify the location of the leaf to be deleted or the location where the leaf is to be inserted. If it is a delete operation, the leaf to be deleted is identified and deleted, and any relevant PSCB modified, if necessary. If it is an insert operation, the tree is walked a second time to insert the leaf and reform or create any PSCB in the chain that needs to be reformed or created. The technique also is applicable to inserting or deleting a prefix of a prefix.
    Type: Grant
    Filed: June 3, 2003
    Date of Patent: December 12, 2006
    Assignee: International Business Machines Corporation
    Inventors: Claude Basso, Jean L. Calvignac, Gordon T. Davis, Marco Heddes, Piyush C. Patel, Steven R. Perrin, Grayson W. Randall, Sonia K. Rovner
  • Patent number: 7137014
    Abstract: In a chassis based server a programmed processor determines the fabric type that allows the maximum numbers of processor modules and switches to be powered on. The processor then allows power to be applied to processor modules and switches whose fabric type is the same as the determined fabric type.
    Type: Grant
    Filed: November 27, 2002
    Date of Patent: November 14, 2006
    Assignee: International Business Machines Corporation
    Inventors: Gregory William Dake, Jeffery Michael Franke, Donald Eugene Johnson
  • Patent number: 7133931
    Abstract: A system and method of altering frames being processed by a network processing unit. The system includes a set of defined alterations, with some of the alterations being fixed alterations which are advantageously handled by hardware to accomplish the fixed alterations rapidly and without executing a stored program and other alterations which include a variable portion, with these variable alterations being accomplished through the use of stored programs allowing the variables to be used to effect variable alterations to a frame. The present system accommodates a change in the duration of life of a frame or information unit and addition or deletion of bits and also allows for a new cyclic redundancy checking to be accomplished for a revised information unit. Advantageously, the frame alteration system is on the same substrate as the processors.
    Type: Grant
    Filed: January 7, 2000
    Date of Patent: November 7, 2006
    Assignee: International Business Machines Corporation
    Inventors: Samuel Steven Allison, Brian Mitchell Bass, Jean Louis Calvignac, Anthony Matteo Gallo, Marco C. Heddes, Michael Steven Siegel, Fabrice Jean Verplanken
  • Patent number: 7126963
    Abstract: A Resource Reservation System includes a Token Generation Unit (TGU) which generates and circulates among nodes of a communications system a Slotted Token (SLT) message having sub-fields to carry identification number for each input port in a node and the resource available for each input port. On receiving the message the Resource Control Unit (RCU) in each node can write port identification number, available resource in appropriate sub-fields of the SLT message, and reserve resources in other nodes by adjusting information in the sub-field associated with the other nodes.
    Type: Grant
    Filed: May 23, 2002
    Date of Patent: October 24, 2006
    Assignee: International Business Machines Corporation
    Inventors: Mohammad Peyravian, Mark Anthony Rinaldi, Ravinder Kumar Sabhiki, Michael Steven Siegel
  • Patent number: 7123622
    Abstract: A system and method of moving information units from an output flow control toward a data transmission network in a prioritized sequence which accommodates several different levels of service. The present invention includes a method and system for scheduling the egress of processed information units (or frames) from a network processing unit according to service based on a weighted fair queue where position in the queue is adjusted after each service based on a weight factor and the length of frame, a process which provides a method for and system of interaction between different calendar types is used to provide minimum bandwidth, best effort bandwidth, weighted fair queuing service, best effort peak bandwidth, and maximum burst size specifications. The present invention permits different combinations of service that can be used to create different QoS specifications.
    Type: Grant
    Filed: April 12, 2001
    Date of Patent: October 17, 2006
    Assignee: International Business Machines Corporation
    Inventors: Brian Mitchell Bass, Jean Louis Calvignac, Marco C. Heddes, Michael Steven Siegel, Fabrice Jean Verplanken
  • Patent number: 7120630
    Abstract: Novel data structures, methods and apparatus for finding a full match between a search pattern and a pattern stored in a leaf of the search tree. A key is input, a hash function is performed on the key, a direct table (DT) is accessed, and a tree is walked through pattern search control blocks (PSCBs) until reaching a leaf. The search mechanism uses a set of data structures that can be located in a few registers and regular memory, and then used to build a Patricia tree structure that can be manipulated by a relatively simple hardware macro. Both keys and corresponding information needed for retrieval are stored in the Patricia tree structure. The hash function provides an n->n mapping of the bits of the key to the bits of the hash key.
    Type: Grant
    Filed: August 28, 2003
    Date of Patent: October 10, 2006
    Assignee: International Business Machines Corporation
    Inventors: Brian Mitchell Bass, Jean Louis Calvignac, Marco C. Heddes, Antonios Maragkos, Piyush Chunilal Patel, Michael Steven Siegel, Fabrice Jean Verplanken
  • Patent number: 7116664
    Abstract: A structure and technique for preventing collisions using a hash table in conjunction with a CAM to identify and prevent collisions of binary keys. A portion of the hash value of a binary key, which does not collide with a portion of the hash value of any other reference binary key, is used as an entry in the hash table. If two or more binary keys have identical values of the portions of the hash values, each of these binary keys are stored in their entirety, in the CAM. The key in the CAM provides a pointer to a data structure where the action associated with that binary key is stored. If the binary key is not found in the CAM, the binary key is hashed, and a specific entry in the hash table is selected using a portion of this hash value.
    Type: Grant
    Filed: May 13, 2002
    Date of Patent: October 3, 2006
    Assignee: International Business Machines Corporation
    Inventors: Gordon Taylor Davis, Andreas Guenther Herkersdorf, Clark Debs Jeffries, Mark Anthony Rinaldi
  • Patent number: 7113517
    Abstract: Apparatus and method that schedules movement of packets within network devices, such as network processors, includes a calendar using a sectored hierarchical routine to identify the next packet to be moved from one of a plurality of flow queues. The segmented hierarchical routine allows searching to begin from any starting point identified by a current pointer CP in each segment.
    Type: Grant
    Filed: September 27, 2001
    Date of Patent: September 26, 2006
    Assignee: International Business Machines Corporation
    Inventor: Darryl Jonathan Rumph
  • Patent number: 7107344
    Abstract: A method and apparatus useful in network management which makes intelligent, high speed, connection allocation decisions, overcoming difficulties encountered heretofore and providing enhanced network services. During episodes of network congestion, some connection requests for a class of service of low value and with currently a high number of existing connections may be purposefully ignored (not acknowledged with an Acknowledge (ACK) packet) so that the processing capability of a device will not become overwhelmed, causing the dropping of new connection is to note the numbers of connections of different classes relative to their service-level contracts, to ignore abundant, low-value connection requests in accordance with value policies when and only when necessary, and to insure that valuable new connection requests that conform to their contract connection rates can be intelligently accommodated.
    Type: Grant
    Filed: August 16, 2001
    Date of Patent: September 12, 2006
    Assignee: International Business Machines Corporation
    Inventors: Gordon Taylor Davis, Clark Debs Jeffries, Mark Anthony Rinaldi