Patents Represented by Attorney Joseph R. Dwyer
  • Patent number: 4246649
    Abstract: In a magnetic bubble (domain) memory chip, transfer gating circuits of propagate elements oriented to be responsive to different phases of in-plane rotating magnetic field are operated by a single conductor which is subjected to current pulses during a specific phase of the rotating field cycle to transfer bubbles onto different bubble paths. The transfer gates perform their gating function only when a control current pulse occurs during a specific phase of the rotating field cycle and are unresponsive to the current pulses at other phase times on the same conductor which actuate other gates.
    Type: Grant
    Filed: March 8, 1979
    Date of Patent: January 20, 1981
    Assignee: Burroughs Corporation
    Inventor: Sidney J. Schwartz
  • Patent number: 4246648
    Abstract: Replicate/swap gating circuitry comprising separate gates oriented to be responsive to different phases of an in-plane magnetic field for transferring data to and from an adjacent storage loop in a bubble memory, said gate being formed of magnetic domain propagate elements arranged in propagation paths to perform several independently operable gating functions by a single current conductor on application of current pulses at selected phases of the rotating in-plane magnetic field.
    Type: Grant
    Filed: March 8, 1979
    Date of Patent: January 20, 1981
    Assignee: Burroughs Corporation
    Inventor: Sidney J. Schwartz
  • Patent number: 4243472
    Abstract: A method for batch processing wafers by liquid phase epitaxy (LPE) dipping methods for uniformity of film thickness wafer-to-wafer and uniformity of film on each individual wafer for use in bubble (domain) memories comprising, supporting a plurality of wafers substantially horizontal on a substrate holder and lowering and immersing said wafers into the melt to be deposited as a thin film on each wafer and, while immersed, continually moving the wafers up and down as well as continually oscillating the wafers through substantially 360.degree..
    Type: Grant
    Filed: March 2, 1979
    Date of Patent: January 6, 1981
    Assignee: Burroughs Corporation
    Inventor: Charles F. O'Neill
  • Patent number: 4231364
    Abstract: A respiratory control comprising a mouthpiece of a shape and size for insertion in a person's mouth having a centrally located filtering cartridge and valve means to control the flow of air past the filtering material on inhale and out a separate exhale corridor on exhale so that the exhaled bacterial, virus or otherwise contaminated air is never mixed with the filtered and enhanced air and the filter is kept clean of contaminated air at all times. Thus, the inhalation of infectious substances of whatever type exhaled, or in the immediate area, are not recycled back into the body.The filtering cartridge is a removable throwaway insert which can be simply plain, (dry), or medicated and can be made available as a sealed package purchasable separately from the mouthpiece and disposed after use.In one embodiment the valve means is part of the filtering cartridge and in a second embodiment the valve means is part of the mouthpiece.
    Type: Grant
    Filed: April 30, 1979
    Date of Patent: November 4, 1980
    Inventor: Fred R. Speshyock
  • Patent number: 4228521
    Abstract: An on-chip magnetic bubble decoder comprising a plurality of sequentially operated gates oriented to be responsive to different phases of the rotating in-plane magnetic field and connected to a conductor which is pulsed at the selected phase of the cycle to transfer bubbles from one track onto different tracks to be propagated therefrom. In its simplest form, one gate oriented to be operated during the phase 2 time of the cycle and a second gate oriented to be responsive to the phase 1 time of the cycle, all operable by a single conductor, thus form a four output decoder with two gates and a single conductor. A second conductor controls a third gate which modulates the bubble stream to control the data being decoded.Further embodiments of the invention include 8 output decoder (2 data bits decoded into 1 of 4 paths) with only two conductors for activating the gates and a 1 of 16 output decoder with 2 conductors for decoding and a third for data control.
    Type: Grant
    Filed: March 8, 1979
    Date of Patent: October 14, 1980
    Assignee: Burroughs Corporation
    Inventor: Sidney J. Schwartz
  • Patent number: 4225944
    Abstract: A bubble memory organization with a plurality of storage loops in-plane folds allows the selective spacing of transfer and other functional elements from each other eliminating crowded conditions at loop ends. This permits the selective placement of the functional elements for the maximization of operating margins. This can also lead to reduced current requirements because passive replicate elements may be used, to reduced transfer line impedances, to reduced number of conductor lines and to a reduced number of transfer points per memory array. For the designs where passive replication is chosen, reliability is improved due to the reduction in current density to levels further below the conductor electromigration thresholds.
    Type: Grant
    Filed: May 1, 1978
    Date of Patent: September 30, 1980
    Assignee: Burroughs Corporation
    Inventors: Sidney J. Schwartz, Chung H. Hsin
  • Patent number: 4215423
    Abstract: This disclosure relates to fast access CCD memory organizations with parallel loops or tracks wherein the total number of data bits which can be stored on a single calculator chip is dependent on the overhead circuitry consisting of a number of refresh amplifiers and various switches required to switch the stored data from a storage track to a read/write location and also on the number of refresh amplifiers as well as control circuitry required for distribution of clock pulses to the respective storage tracks. As the number of switches and refresh amplifiers is increased, so is the total area required for storage bits. As the number of clock switches is increased, the power dissipation for the semiconductor chip is decreased. As the number of refresh amplifiers is increased, the access time and total service time is decreased. A number of different optimum memory organizations are disclosed.
    Type: Grant
    Filed: October 2, 1978
    Date of Patent: July 29, 1980
    Assignee: Burroughs Corporation
    Inventors: Satish L. Rege, Beng-Yu Woo
  • Patent number: 4202043
    Abstract: A bubble memory system comprising data chips each having a plurality of storage loops and wherein each is provided with additional storage loops to compensate for defective loops in the chip, and a control chip having control loops, one loop for each data chip and with bit positions corresponding in number to the number of storage loops in the data chip and connected to the data chip to prevent defective loops on the data chips from being utilized. Thus, data chips which would otherwise have been discarded as defective can now be used.
    Type: Grant
    Filed: November 3, 1977
    Date of Patent: May 6, 1980
    Assignee: Burroughs Corporation
    Inventor: Farooq M. Quadri
  • Patent number: 4198687
    Abstract: A package of bubble memory components including magnetic bubble memory chips or modules disposed between bias magnets for maintaining and establishing bubbles in said chips, field drive coils for propagating the bubbles established in the chips and thermal management means for stabilizing and dissipating the heat generated within the package including heat conductor means disposed adjacent to the drive coils for conducting heat therefrom and flexible heat conductor means also disposed adjacent the drive coils and flexed, sometimes folded back, toward other components of the package to control the heat of these other components thus stabilizing the temperature of the components with respect to the heat generated by the drive coils.
    Type: Grant
    Filed: August 11, 1978
    Date of Patent: April 15, 1980
    Assignee: Burroughs Corporation
    Inventor: Wilbur T. Layton
  • Patent number: 4198688
    Abstract: A package having bubble memory components including bubble memory chips or modules disposed between bias magnets for maintaining and establishing bubbles in said chips, field drive coils for propagating the bubbles therein and further including thermal control means for stabilizing and dissipating the heat generated in the package and which also aid in the packaging of the components. The thermal control means include discrete compliant members of thermally conductive material which also aid in the assembly of the package, additional thermal members and spacing means both also of thermally conductive material which locate the chips relative to the bias magnets.
    Type: Grant
    Filed: August 11, 1978
    Date of Patent: April 15, 1980
    Assignee: Burroughs Corporation
    Inventor: Wilbur T. Layton
  • Patent number: 4195358
    Abstract: Circuitry for programming a read-only memory comprising a plurality of decoding transistors of low current density for selecting the row of the programmable matrix and which function to operate a high current density control transistor through a large voltage swing for controlling an output transistor of the circuitry connected directly to the array. The decoding transistors are operable through a CML voltage swing in a non-saturated mode with minimum current to operate the control transistor of high current density from cut-off to saturation to turn the output transistor ON or OFF which in turn directs the high voltage from a high voltage source to the programmable memory.
    Type: Grant
    Filed: December 26, 1978
    Date of Patent: March 25, 1980
    Assignee: Burroughs Corporation
    Inventor: Raymond C. Yuen
  • Patent number: 4195261
    Abstract: A method and an apparatus for characterizing magnetic materials especially LPE garnet films for magnetic bubble memory applications are described. The method and apparatus comprises in the first embodiment passing monochromatic linearly polarized light through a magnetic film, under no applied external field (Ha=0) with a randomly oriented stripe domain structure to produce a single diffraction grating, then (1) the angle of the first order diffracted beam is deduced by directly comparing the currents produced by a linear position photodetector and an ordinary intensity photodetector and (2) next a magnetic field (Ha) is applied normal to the surface of the film and the field is increased until intensity of the second order diffraction beam is maximized. In the second embodiment of the method so that higher signals can be detected for the first order diffracted beam, the film is magnetized so that the stripe domain configuration is parallel and the foregoing steps followed.
    Type: Grant
    Filed: September 29, 1978
    Date of Patent: March 25, 1980
    Assignee: Burroughs Corporation
    Inventor: Robert L. Zwingman
  • Patent number: 4192729
    Abstract: An apparatus for forming an interconnect structure on an integrated circuit chip by employing a single chamber for both the required etching and anodization. It has been discovered that an etchant-electrolyte such as phosphoric acid solution in the ratios of one part phosphoric acid to four parts of water can serve as both an etchant and an electrolyte without causing deterioration of the photoresist pattern representing the interconnect structure.
    Type: Grant
    Filed: April 3, 1978
    Date of Patent: March 11, 1980
    Assignee: Burroughs Corporation
    Inventors: Dan Cancelleri, Charles E. Thompson
  • Patent number: 4191365
    Abstract: A substrate holder for use in liquid phase epitaxy growth of magnetic garnet films for bubble memories comprising a dipping rod having substrate holding means including hooks at one end which confine the substrate securely yet permit tilting movement so as to allow the substrate to assume a horizontal position for liquid phase epitaxy growth in the flux in which the substrate is immersed and to assume a tilted position as the substrate is being withdrawn from the flux for flux runoff. One embodiment discloses a substrate holder for one substrate while a second embodiment shows a holder for supporting a plurality of substrates for processing a batch of substrates in one operation.
    Type: Grant
    Filed: March 2, 1979
    Date of Patent: March 4, 1980
    Assignee: Burroughs Corporation
    Inventor: Charles F. O'Neill
  • Patent number: 4189671
    Abstract: A voltage regulator and regulator buffer having a plurality of matched transistors including an output transistor arranged such that the fluctuation in supply voltage is sensed by a shunt circuit which tracks such voltage fluctuation and eliminates such fluctuations from the output transistor by causing current variations due to supply voltage variations to flow through another transistor connected in parallel with the output transistor thus eliminating the first order effects of power supply voltage variations on output voltage. The voltage regulator buffer comprises a plurality of matched transistors which also has a voltage supply variation shunt circuit similar to the regulator shunt circuit to regulate the current through an output transistor thus eliminating the effect of the power supply voltage thereon and providing an output voltage of a precise amount.
    Type: Grant
    Filed: April 3, 1978
    Date of Patent: February 19, 1980
    Assignee: Burroughs Corporation
    Inventor: Raymond C. Yuen
  • Patent number: 4183460
    Abstract: An In-Situ Test and Diagnostic Circuit and Method to monitor the integrity of external connections of a current mode logic integrated circuit chip (inputs and outputs) as well as the integrity of the logic function thereof. The circuit comprises three parts: an "Open" Input Detector to detect open connections or connections that are becoming open between one chip and another; an Output Short Detector to monitor shorts at any chip output; and a Signature Test and Diagnostic circuit to determine if the logic function of the chip itself is operational. All the foregoing circuit parts are formed as an integral part of each CML chip and connected to an output terminal called a Test and Diagnostic Pin.
    Type: Grant
    Filed: December 23, 1977
    Date of Patent: January 15, 1980
    Assignee: Burroughs Corporation
    Inventors: Raymond C. Yuen, Mark A. Menezes, Herbert Stopper
  • Patent number: 4180864
    Abstract: Circuitry for use in bubble memory propagation wherein field drive coils receive energy from an energy storage device (capacitor) through a plurality of selectively located and timed switches. A basic digitally controlled switching arrangement is illustrated in matrix form and, in one embodiment, one capacitor with two voltage sources and, in another embodiment, two capacitors and a single voltage source are utilized. Selective timing of the opening and closing of the switches provides a digitally controlled series of 1/2 sine wave current pulses to meet operating requirements for bubble propagation. Additional variations of the selective timing of switch opening and closings are used to elongate the start and stop pulses to provide better operating margins for these events. Field rotation in either clockwise, or counter-clockwise, or a mix of rotational senses is readily achieved under digital control.
    Type: Grant
    Filed: September 5, 1978
    Date of Patent: December 25, 1979
    Assignee: Burroughs Corporation
    Inventor: Sidney J. Schwartz
  • Patent number: 4179749
    Abstract: A defect tolerant lattice file memory having means in the access column for annihilating lattice bubbles in a previously detected defective row thus eliminating an error in the digital information to be extracted from the lattice file. This annihilation means comprises a ladder formed in a conductor overlay located over the access column in which partial current loops may be formed by disconnecting certain selected portions of the ladder. These current loops create a localized magnetic field when the ladder conductor is activated thus annihilating the selected row of bubbles. Thus, lattice file chips found to have defective rows which will not support and maintain lattice bubbles in their desired coded state can now be utilized.
    Type: Grant
    Filed: June 23, 1978
    Date of Patent: December 18, 1979
    Assignee: Burroughs Corporation
    Inventor: Robert L. Zwingman
  • Patent number: 4179750
    Abstract: A digital-to-analog converter utilizing magnetic domains with particular application to addressing large capacity bubble memory modules economically and with as short a delay as one cycle of rotation of the magnetic in-plane field including a plurality of storage loops and magnetoresistive sensors arranged in bridge networks to produce signals whose amplitude denote a weighted binary digit.
    Type: Grant
    Filed: April 13, 1978
    Date of Patent: December 18, 1979
    Assignee: Burroughs Corporation
    Inventor: Farooq M. Quadri
  • Patent number: 4165252
    Abstract: A method for chemically treating a single side of a workpiece, such as for etching or anodizing a semiconductor wafer, comprising, placing such a workpiece face down on a flat centrally apertured, relatively level table having a top or work surface of a size and shape commensurate with the dimensions of the workpiece and introducing the liquid for the chemical treatment between the top surface and side of the workpiece to be treated where the liquid passes over the entire surface to be treated and then returns to its source. The method also includes, for certain applications, a pre-processing of the workpiece by oxidizing the workpiece surface on the side of the workpiece opposite of the one to be treated to be treated to prevent creeping of the liquid around the edges thereof.
    Type: Grant
    Filed: March 6, 1978
    Date of Patent: August 21, 1979
    Assignee: Burroughs Corporation
    Inventor: Stephen R. Gibbs