Patents Represented by Attorney Joseph T. Downey
  • Patent number: 5325517
    Abstract: The functions of two virtual operating systems (e.g., S/370 VM, VSE or IX370 and S/88 OS) are merged into one physical system. Partner pairs of S/88 processors run the S/88 OS and handle the fault tolerant and single system image aspects of the system. One or more partner pairs of S/370 processors are coupled to corresponding S/88 processors directly and through the S/88 bus. Each S/370 processor is allocated from 1 to 16 megabytes of contiguous storage from the S/88 main storage. Each S/370 virtual operating system thinks its memory allocation starts at address 0, and it manages its memory through normal S/370 dynamic memory allocation and paging techniques. The S/370 is limit checked to prevent the S/370 from accessing S/88 memory space. The S/88 Operating System is the master over all system hardware and I/O devices.
    Type: Grant
    Filed: May 17, 1989
    Date of Patent: June 28, 1994
    Assignee: International Business Machines Corporation
    Inventors: Ernest D. Baker, John M. Dinwiddie, Jr., Lonnie E. Grice, James M. Joyce, John M. Loffredo, Kenneth R. Sanderson, Gustavo A. Suarez
  • Patent number: 5283868
    Abstract: The functions of two virtual operating systems (e.g., S/370 VM, VSE or IX370 and S/88 OS) are merged into one physical system. Partner pairs of S/88 processors run the S/88 OS and handle the fault tolerant and single system image aspects of the system. One or more partner pairs of S/370 processors are coupled to corresponding S/88 processors directly and through the S/88 bus. Each S/370 processor is allocated from 1 to 16 megabytes of contiguous storage from the S/88 main storage. Each S/370 virtual operating system thinks its memory allocation starts at address 0, and it manages its memory through normal S/370 dynamic memory allocation and paging techniques. The S/370 is limit checked to prevent the S/370 from accessing S/88 memory space. The S/88 Operating System is the master over all system hardware and I/O devices.
    Type: Grant
    Filed: May 17, 1989
    Date of Patent: February 1, 1994
    Assignee: International Business Machines Corp.
    Inventors: Ernest D. Baker, John M. Dinwiddie, Jr., Lonnie E. Grice, James M. Joyce, John M. Loffredo, Kenneth R. Sanderson
  • Patent number: 5144692
    Abstract: The functions of two virtual operating systems (e.g., S/370 VM, VSE or IX370 and S/88 OS) are merged into one physical system. Partner pairs of S/88 processors run the S/88 OS and handle the fault tolerant and single system image aspects of the system. One or more partner pairs of S/370 processors are coupled to corresponding S/88 processors directly and through the S/88 bus. Each S/370 processor is allocated from 1 to 16 megabytes of contiguous storage from the S/88 main storage. Each S/370 virtual operating system thinks its memory allocation starts at address 0, and it manages its memory through normal S/370 dynamic memory allocation and paging techniques. The S/370 is limit checked to prevent the S/370 from accessing S/88 memory space. The S/88 Operating System is the master over all system hardware and I/O devices.
    Type: Grant
    Filed: May 17, 1989
    Date of Patent: September 1, 1992
    Assignee: International Business Machines Corporation
    Inventors: Ernest D. Baker, John M. Dinwiddie, Jr., Lonnie E. Grice, John M. Loffredo, Kenneth R. Sanderson, Gustavo A. Suarez
  • Patent number: 5121354
    Abstract: A word addressable random access memory includes additional logic permitting accessing on bit boundaries during read/write operations requiring only one memory cycle. During each memory cycle, two "adjacent" word locations are selected for access concurrently in response to the decoding of one address. Logic responsive to bit boundary select signals determine which memory cells of the two "adjacent" word locations are in fact accessed to store or retrieve a word of data. In one preferred embodiment, the boundary select logic controls the data in/out lines of a pair of odd/even arrays. In another preferred embodiment, the boundary select logic includes logic within each cell of a single memory array.
    Type: Grant
    Filed: March 12, 1990
    Date of Patent: June 9, 1992
    Assignee: International Business Machines Corp.
    Inventor: Baiju D. Mandalia
  • Patent number: 5113522
    Abstract: The functions of two virtual operating systems (e.g., S/370 VM, VSE or IX370 and S/88 OS) are merged into one physical system. Partner pairs of S/88 processors run the S/88 OS and handle the fault tolerant and single system image aspects of the system. One or more partner pairs of S/370 processors are coupled to corresponding S/88 processors directly and through the S/88 bus. Each S/370 processor is allocated from 1 to 16 megabytes of contigous storage from the S/88 main storage. Each S/370 virtual operating system thinks its memory allocation starts at address 0, and it manages its memory through normal S/370 dynamic memory allocation and paging techniques. The S/370 is limit checked to prevent the S/370 from accessing S/88 memory space. The S/88 Operating System is the master over all system hardware and I/O devices.
    Type: Grant
    Filed: May 17, 1989
    Date of Patent: May 12, 1992
    Assignee: International Business Machines Corporation
    Inventors: John M. Dinwiddie, Jr., Bobby J. Freeman, Lonnie E. Grice, John M. Loffredo, Kenneth R. Sanderson, Gustavo A. Suarez
  • Patent number: 4899366
    Abstract: In a modem receiver having a fixed sample rate relative to incoming symbols and a tapped delay adaptive equalizer with fractional tap spacing, coefficients used in the equalization computations are rotated relative to a reference tap in order to compensate for relative drift between incoming signals, representing real (i.e. non-training) data, and the clock controlling sampling. By itself, such rotation would tend to distort received data by shifting the sampling phase away from the center of the received symbols. Logic means included herewith operates to prevent such distortion, so that the integrity of the data output of the receiver is unaffected by the rotation. In the disclosed embodiment, such logic means operates to shift the phase of the "sum of products" computation (product of data and tap coefficients) relative to the flow of data into the fractionally spaced delay network.
    Type: Grant
    Filed: August 2, 1988
    Date of Patent: February 6, 1990
    Assignee: International Business Machines Corporation
    Inventors: Gordon T. Davis, Baiju D. Mandalia
  • Patent number: 4804954
    Abstract: A system transmitting synchronization signals and coded message signals is described. In particular, coded synchronization signals are used to indicate the transmission of coded message signals or the absence of transmission of coded message signals following the transmission of the coded synchronization signal, thereby providing a battery saving function for a personal communications receiver.
    Type: Grant
    Filed: April 30, 1987
    Date of Patent: February 14, 1989
    Assignee: Motorola, Inc.
    Inventors: Philip P. Macnak, David F. Williard
  • Patent number: 4803703
    Abstract: A system and method is described for synchronizing a paging receiver decoder to receive information in the form of digitally encoded signals. The digital signals include a synchronization signal followed by message data. The synchronization signal includes a first and second portion of the synchronization signal. The decoding means is synchronized to the first portion for generating a timing signal. The decoder then measures a phase relationship between the timing signal and the second portion of the synchronization signal. The timing signal generated by the decoder is adjusted according to the phase relationship to improve the decoding of the incoming information. In a second embodiment, a second synchronization signal is transmitted for statistically improving the accuracy of the timing signal.
    Type: Grant
    Filed: April 30, 1987
    Date of Patent: February 7, 1989
    Assignee: Motorola, Inc.
    Inventors: Michael J. DeLuca, David F. Willard
  • Patent number: 4794392
    Abstract: An alerting device for a paging receiver for generating vibration motion in the paging receiver housing. The alerting means comprises an electric motor, an eccentric weight, and a linking means. The electric motor is activated in response to an alert signal for rotating a driving shaft. The driving shaft is coupled to the eccentric weight by the linking means for rotating the eccentric weight. The linking means includes a driving means and a receiving means such that rotary motion is transmitted from the shaft to the eccentric weight while preventing transmission of vibration motion from the eccentric weight to the shaft. The eccentric weight is mechanically attached to the housing for transmitting the vibration motion directly to the housing without passing the vibration motion through the electric motor.
    Type: Grant
    Filed: February 20, 1987
    Date of Patent: December 27, 1988
    Assignee: Motorola, Inc.
    Inventor: George J. Selinko
  • Patent number: 4786902
    Abstract: A wrist worn device includes a digital watch circuit and a receiver circuit which responds to coded message signals including selective call signalling and message information. An input steering circuit interfaces between the watch circuit and the receiver circuit for normally providing control of the watch circuit by switches located in the device case. The normal watch functions of the switches are permanently marked on the device case. The watch circuit and the receiver circuit couple to an information selector circuit which normally selects the watch output for a common display. When coded message signals are received, the switches are enabled to control the receiver circuit, and the received message information is selected for display. New indicia, electronically selected by the information selector circuit, are displayed on the display defining the new functions of the switches.
    Type: Grant
    Filed: February 20, 1987
    Date of Patent: November 22, 1988
    Assignee: Motorola, Inc.
    Inventors: Walter L. Davis, Philip P. Macnak
  • Patent number: 4784615
    Abstract: A flexible circuit interconnect system and method for providing direct electrical contact between a flexible circuit and a printed circuit board or an additional flex circuit is disclosed. In one embodiment, elastomeric material is located between the flex circuit and a rigid support to provide an interconnection receptacle for electrical contact with a printed circuit board. In another embodiment, one flex circuit surrounds a formed elastomeric wedge and a second flex circuit is rigidly supported with an opening corresponding to the wedge. Compression of elastomeric material maintains direct contact between the connecting pads of the circuit members.
    Type: Grant
    Filed: January 7, 1987
    Date of Patent: November 15, 1988
    Assignee: Motorola, Inc.
    Inventor: Toh Teng-Hong
  • Patent number: 4775083
    Abstract: A carrying case for a portable radio is provided which includes an attachment structure for attaching the case to the radio user. The carrying case includes a two position sound deflector which, at the option of the user, is situated in a first position to deflect sound upward toward the user's ears or which is situated in a second position for protecting the controls of the radio from the environment.
    Type: Grant
    Filed: February 2, 1987
    Date of Patent: October 4, 1988
    Assignee: Motorola, Inc.
    Inventors: Marilyn S. Burger, Eugene R. Fay, Farid Cifuentes
  • Patent number: 4772887
    Abstract: A paging simulcast station remote control system decoder. The paging system decoder responds to signals generated in accordance with a predetermined signalling scheme comprising a series of tones and timed pauses. The decoder is also responsive to user programmable switches which provide station function tone and sector information. The paging system decoder then selectively deactivates a paging simulcast transmitter in response to signals received through a conventional paging communication link.
    Type: Grant
    Filed: August 5, 1983
    Date of Patent: September 20, 1988
    Assignee: Motorola, Inc.
    Inventors: Stephen H. Dunkerton, Gary D. Erickson, Scott G. Chapman, Gary R. Reynolds
  • Patent number: 4769642
    Abstract: A paging receiver with an LPC speech synthesizer is described. The paging receiver of the present invention includes a controller and decoder, and a microprocessor controlled speech synthesizer both coupled to a dual port memory. Digitally encoded voice messages are stored in a dual port memory which includes a scratchpad area for storing control words and address pointers which indicate the attributes and location of stored digitally encoded voice messages. Messages are reconstructed by reading the control words and address pointers and processing the information stored in memory with a speech synthesizer. The structure is adapted to store and process LPC encoded signals and it permits a message to be stored while another is being reproduced. In addition, information contained in the control words permits old or read messages to be discarded if a new message must be stored.
    Type: Grant
    Filed: November 27, 1987
    Date of Patent: September 6, 1988
    Assignee: Motorola, Inc.
    Inventors: Walter L. Davis, Wendell Little
  • Patent number: 4769610
    Abstract: This tone decoder utilizes three correlators for detecting the presence of a desired tone signal. A main correlator correlates to the desired tone frequency, while two side correlators are used to correlate to frequencies above and below the desired tone frequency. Tone detection is indicated by correlation of the main correlation and absence of correlation by the side correlators. Improved bandwidth and/or correlation time is achieved as compared to utilizing a single correlator.
    Type: Grant
    Filed: June 29, 1987
    Date of Patent: September 6, 1988
    Assignee: Motorola, Inc.
    Inventor: Karl R. Weiss
  • Patent number: 4766366
    Abstract: A trimmable current source for use with low voltage circuitry includes a plurality of trimming networks. A voltage-divider circuit is connected to the trimming networks. Each of the trimming networks includes a resistor in an isolated epitaxial region series connected to a zener diode. A programming signal, having a voltage level which would normally damage the low voltage circuitry can be applied to the junction of the resistor and zener diode, and to the isolated epitaxial region containing the resistor of the trimming network to be programmed without damage to the low voltage circuitry.
    Type: Grant
    Filed: September 3, 1987
    Date of Patent: August 23, 1988
    Assignee: Motorola, Inc.
    Inventor: Walter L. Davis
  • Patent number: 4761582
    Abstract: An electroacoustic transducer such as a piezoelectric element transducer includes an output mode for generating an alert signal and an input mode for generating a switching signal. The transducer comprises an actuating means, such as a pushbutton, a resilient member, such as a snap action dome, a housing and a piezoelectric element. In the output mode, voltage is supplied to the piezoelectric element to generate mechanical vibrations which are converted to acoustical energy by a resonant cavity and port in the housing. In the input mode, manual pressure on the pushbutton forces the dome, being interposed between the pushbutton and piezoelectric element to collapse and deform the piezoelectric element. In response, the piezoelectric element generates an electrical signal. A voltage sensing circuit senses the electrical signal and generates an input signal.
    Type: Grant
    Filed: March 19, 1987
    Date of Patent: August 2, 1988
    Assignee: Motorola, Inc.
    Inventor: John M. McKee
  • Patent number: 4758833
    Abstract: A paging station remote control system decoder is described. The paging system decoder is responsive to signals generated in accordance to a signalling scheme comprising a series of tones and timed pauses generated by a paging system encoder. The paging system decoder then causes a paging transmitter station to key in an analog or binary modulation mode or to switch from one mode to another without first dekeying the paging transmitter.
    Type: Grant
    Filed: April 22, 1983
    Date of Patent: July 19, 1988
    Assignee: Motorola, Inc.
    Inventors: Stephen H. Dunkerton, David R. Petreye, Scott G. Chapman
  • Patent number: 4754423
    Abstract: This is a selector circuit for an electronic device such as a pager that has a plurality of functions with each of the functions having a plurality of levels. First and second switches are provided for selecting the functions and levels. A controller such as a microprocessor is responsive to the first and second switches for selecting the functions and levels. The functions are selected by first actuating the first switch and then actuating the second switch while the first switch is maintained actuated. Levels of selected functions are selected by first actuating the second switch and then actuating the first switch while the second switch is maintained actuated.
    Type: Grant
    Filed: June 16, 1986
    Date of Patent: June 28, 1988
    Assignee: Motorola, Inc.
    Inventor: Thomas J. Rollins
  • Patent number: D298136
    Type: Grant
    Filed: April 18, 1986
    Date of Patent: October 18, 1988
    Assignee: Motorola, Inc.
    Inventors: Richard J. Toth, George J. Selinko, James Brinkerhoff