Abstract: An asynchronous transfer mode scheduler schedules connection utilizing available bit rate (ABR) modes of traffic, unspecified bit rate (UBR) modes of traffic, variable bit rate (VBR) modes of traffic, and constant bit rate (CBR) modes of traffic. The scheduler communicates with a dynamic schedule table which includes a programmable number of slots. Each slot includes a CBR entry, a tunnel entry, and a number of VBR entries. The VBR entries store a slot tail pointer which indicates the end of a linked list. The scheduler utilizes the single bucket algorithm or dual bucket algorithm to dynamically schedule connections on future slots. The scheduler places connections using the VBR mode of traffic in a priority queue and takes the highest priority connection in the priority queue for transmission on the network.
Abstract: A multi-communication rate switching physical device for a port of a mixed communication rate Ethernet repeater network. The present invention includes a physical device for recovering bits from a wire connection (e.g., fiber, twisted pair, etc.) that is coupled to computer system adapter. The physical device can be implemented on a single chip integrated within an Ethernet repeater hub within each hub port. The physical device chip of the invention includes a front end multiplexer coupled to channel information between a 10 Base T physical device circuit and a 100 Base T physical device circuit, depending on the result of an auto-negotiation circuit also on the physical device chip. The physical device chip also advantageously employs a second, back end multiplexer, that is coupled to channel data between either the 10 Base T physical device circuit or the 100 Base T physical device circuit and one of a multiple of media independent interfaces (MIIs).
Abstract: A physical vapor deposition chamber assembly is provided for use in depositing metal particles onto a wafer placed inside the chamber assembly. The physical vapor deposition assembly includes a chamber having an opening, and a target containing a desired metal to be deposited on a wafer placed inside the chamber, with the target adapted to be secured at the opening of the chamber. The assembly further includes an insulator positioned along the boundary of the opening, and having opposing first and second surfaces, with the second surface having a ridge extending therealong and defining a narrow horizontal ridge surface. A first O-ring is positioned between the first surface of the insulator and the chamber along the boundary of the opening, and a second O-ring is positioned between the ridge surface of the insulator and the target.
Abstract: A lid for protecting and covering an integrated circuit provided in a chip-on-board package is disclosed. The lid has a wall surrounding the integrated circuit, and a top cover covering the integrated circuit, with the wall and top cover provided in a single piece.
Abstract: The present invention is for an implementation of a digital decimation filter and/or digital interpolation filter and a method of decimating and/or interpolating a multi-bit input signal, where n/2 additions are performed, where n=the number of bits in each filter coefficient. Scaling and multiplication of data with coefficients is performed using a common DSP architecture. Coefficient values, having an associated scaling factor, are stored in memory. The coefficients are stored in coded form, and are then decoded prior to multiplication by the data values.
Abstract: A strobed comparator for a large common mode range is described, which includes a mixture of natural and enhancement transistors, and a high-swing folded-cascode architecture, to achieve an improved dynamic range suitable for audio applications.
Abstract: The present invention comprises apparatus and a method of automatically controlling the permeability of filter beds. In particular, this invention directs itself to filter beds or tanks that are divided into a plurality of contiguous compartments or cells, each compartment containing a filtering media substrate, which substrate is cleansed or backwashed, periodically, when necessary, by a traveling bridge backwash mechanism. The duration and frequency of backwashing is automatically controlled to maintain a desired overall permeability and throughput performance of the filter bed. Permeability control is dynamic to maintain optimum performance under all conditions, i.e. changing in response to fluctuating filter bed hydraulic or solids loading rates.