Patents Represented by Attorney Joseph W. Stanford & Bennett, L.L.P. King, Jr.
  • Patent number: 5995030
    Abstract: An active current steering semi-digital FIR filter for a digital-to-analog conversion circuit, which includes a shift register having a 1-bit digital input stream and a plurality of output taps, where each output tap provides a 1-bit signal which has a value of a logic 1 or a logic 0, and a plurality of current paths, where each path includes an active element, such as a transistor, having a relatively high output impedance, which is connected to a common current source, and to an op amp for current-to-voltage conversion. The relatively high output impedance of the active current steering element causes any error term resulting from offset at the op amp inputs to be minimized.
    Type: Grant
    Filed: September 12, 1995
    Date of Patent: November 30, 1999
    Assignee: Advanced Micro Devices
    Inventor: Carlin Dru Cabler
  • Patent number: 5739721
    Abstract: A high swing, low power output stage for an operational amplifier is provided which includes: 1) a folded-cascode gain stage having a differential pair of natural V.sub.T devices, which are preferably P-channel transistors; 2) a source-follower input stage connected to the folded-cascode gain stage and to the input of the high swing output stage; and 3) a source-follower output stage connected to the folded-cascode gain stage connected to an output of the source-follower stage and to the output of the high swing output stage. The high swing output stage also includes a compensation capacitor which is used to provide dominant pole frequency compensation for the high swing output stage.
    Type: Grant
    Filed: February 13, 1996
    Date of Patent: April 14, 1998
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Geoffrey E. Brehmer
  • Patent number: 5729483
    Abstract: The present invention is for an implementation of a multi-stage digital interpolator and a method of interpolation, where n/2 additions are performed, where n=the number of bits in each filter coefficient being multiplied. Scaling and multiplication of data with coefficients is performed using a common architecture. Coefficient values, having an associated scaling factor, are stored in memory. The coefficients are stored in coded form, and are then decoded prior to multiplication by the data values.
    Type: Grant
    Filed: November 14, 1995
    Date of Patent: March 17, 1998
    Assignee: Advanced Micro Devices
    Inventor: Glen Brown