Patents Represented by Attorney, Agent or Law Firm Joshua W. Korver
  • Patent number: 6819164
    Abstract: A circuit is arranged to enable bi-directional trimming of a reference voltage. A trim current is generated by mirroring a bias current using one or more selectable current source circuits. The selectable current source circuits may each contain transistors that are sized differently from corresponding transistors of the other selectable current source circuits. The sizing may be arranged in a binary chain such that a range of currents may be generated for the trim current while allowing for selection of the level of adjustment for the reference voltage. The current selected for the trim current depends on which of the selectable current sources is enabled. The node corresponding to the trim current is selectively coupled to a load to either increase the voltage across the load or decrease the voltage across the load, providing bi-directional trimming of the reference voltage measured across the load.
    Type: Grant
    Filed: October 17, 2002
    Date of Patent: November 16, 2004
    Assignee: National Semiconductor Corporation
    Inventor: Sean S. Chen
  • Patent number: 6759836
    Abstract: A first capacitive circuit is coupled to an output of a low drop-out (LDO) regulator. A second capacitive circuit is selectively coupled to a power supply signal circuit and arranged to store charge when the LDO regulator is deactivated. When the LDO regulator is activated, a portion of the charge on the second capacitive circuit is transferred to the first capacitive circuit. The LDO regulator provides an output when the charge associated with the first capacitive circuit reaches a predetermined level. The power-on time of the LDO regulator depends on the time required to increase the charges of the first capacitance circuit to the predetermined level from a level associated with the transferred charge from the second capacitive circuit. Also, the presence of the first capacitive circuit prevents noise associated with the power supply from being reflected at the output of the LDO regulator.
    Type: Grant
    Filed: October 1, 2002
    Date of Patent: July 6, 2004
    Assignee: National Semiconductor Corporation
    Inventor: Robert G. Black, Jr.
  • Patent number: 6750685
    Abstract: A bi-directional charge driver circuit provides an output voltage that may be increased or decreased according to two control signals. When the output voltage is configured as an adjustable reference voltage, the adjustable reference voltage may be varied in selectable increments to obtain a desired reference voltage. Alternatively, when the bi-directional charge driver circuit is configured as a digital-to-analog converter, the two control signals are given by a logic circuit in response to two digital input signals. The two digital input signals are converted by the bi-directional charge driver circuit to the analog output voltage.
    Type: Grant
    Filed: May 23, 2002
    Date of Patent: June 15, 2004
    Assignee: National Semiconductor Corporation
    Inventor: Francisco Javier Guerrero Mercado
  • Patent number: 6717458
    Abstract: An apparatus and method for a DC-DC charge pump voltage converter-regulator circuit includes a control circuit, a multiplier circuit, and a feedback circuit. The feedback circuit includes a load circuit, a comparator circuit, and a voltage reference circuit. The multiplier circuit produces an output signal by multiplying a supply signal according to a multiplication factor. The output signal is communicated to the load circuit. The output signal is measured producing a sense signal. The voltage reference circuit produces a reference voltage. The control circuit regulates the output signal according the result of a comparison between the sense signal and the reference voltage. In one embodiment, the multiplication factor is adjusted to compensate for a change in the supply signal. The multiplication factor may be increased to compensate for a decrease in the supply signal.
    Type: Grant
    Filed: December 3, 2001
    Date of Patent: April 6, 2004
    Assignee: National Semiconductor Corporation
    Inventor: Vladislav Y. Potanin
  • Patent number: 6714067
    Abstract: A bootstrap capacitor low voltage prevention circuit and method to control the same is provided. When a low voltage situation is detected the bootstrap capacitor is charged. An over voltage protection circuit is included that prevents the circuit from staying in an over voltage situation for a long period of time.
    Type: Grant
    Filed: June 6, 2002
    Date of Patent: March 30, 2004
    Assignee: National Semiconductor Corporation
    Inventor: Douglas Robert Farrenkopf
  • Patent number: 6702457
    Abstract: An apparatus and method is directed to a thermal wake-up circuit and a thermal sensor that are utilized by another circuit. The thermal wake-up circuit monitors a temperature associated with the other circuit. The thermal sensor is activated by the thermal wake-up circuit when the temperature exceeds a first threshold level. The thermal sensor is deactivated by the thermal wake-up circuit when the temperature is below the first threshold level. In one embodiment, addition thermal sensors may be activated and deactivated by the thermal wake-up circuit. The thermal sensor and additional thermal sensors may be used to activate protection circuitry or to shut down the other circuit. Power consumption by the thermal sensor is minimized by maintaining the thermal sensor inactive until activated by the thermal wake-up circuit.
    Type: Grant
    Filed: December 20, 2001
    Date of Patent: March 9, 2004
    Assignee: National Semiconductor Corporation
    Inventor: Gregory J. Smith
  • Patent number: 6695154
    Abstract: A rack for supporting and displaying recreational boards wherein at least a portion of design features of each of the recreational boards is simultaneously available for visual inspection. The rack includes mounting members, an elongated support member, and securing members. The angle of and distance between each securing member is such that at least a portion of design features for each recreational board is simultaneously visible.
    Type: Grant
    Filed: April 22, 2002
    Date of Patent: February 24, 2004
    Inventor: Amy M. Jacobs
  • Patent number: 6693488
    Abstract: An apparatus and method is directed to a power amplifier control circuit that includes a bandwidth switching circuit. The power amplifier control circuit can be used in a GSM EDGE system for controlling the output power of a communication signal. The loop bandwidth of the power amplifier control circuit is high during ramp-up and ramp-down of the output power, and low during transmission of the communication signal. The power amplifier control circuit regulates the output power during power ramping, while preserving the amplitude modulation portion of the communication signal during transmission. The bandwidth switching circuit includes a pair of capacitance circuits that are arranged such that both capacitance circuits charge without affecting the loop bandwidth. The bandwidth switching circuit operates at high speeds associated with a GSM EDGE system, while avoiding transient glitches that may occur due to charging and discharging in the capacitance circuits.
    Type: Grant
    Filed: September 4, 2001
    Date of Patent: February 17, 2004
    Assignee: National Semiconductor Corporation
    Inventor: Arie J. van Rhijn
  • Patent number: 6667638
    Abstract: A frequency divider circuit utilizes an asynchronous slip request signal to provide an output clock signal according to a programmable divide ratio “R”. A high frequency input clock signal has a frequency divided by a first factor to produce a divided signal when a slip signal is inactive. The output clock signal is produced by functionally dividing the frequency of the divided signal by a second factor. The second factor is determined by the programmable divide ratio divided by the first factor such that the frequency of the output clock signal is related to the frequency of the input clock signal and the programmable divide ratio. An asynchronous slip request signal is generated when the programmable divide ratio is a non-multiple of the first factor. The asynchronous slip request signal activates the slip signal such that a transition of the divided signal is skipped.
    Type: Grant
    Filed: September 20, 2002
    Date of Patent: December 23, 2003
    Assignee: National Semiconductor Corporation
    Inventors: Paul Joseph Kramer, Jered Michael Sandner
  • Patent number: 6657509
    Abstract: A differentially controlled variable capacitor includes two variable capacitors that are arranged effectively in parallel and receive differential input. The variable capacitors are coupled to a common node that is biased to a potential. For diode-type variable capacitors, the bias potential should ensure that the variable capacitors continue to operate as capacitors by preventing the diode device from becoming forward-biased. The differentially controlled variable capacitors are useful as tuning elements in circuits that require frequency control. A noise signal may be injected into the control signal of the variable capacitors. The effective parallel arrangement of the variable capacitors allows differential control of the effective capacitance value such that the noise signal does not alter the effective capacitance value.
    Type: Grant
    Filed: May 20, 2002
    Date of Patent: December 2, 2003
    Assignee: National Semiconductor Corporation
    Inventor: James R. Ohannes
  • Patent number: 6624696
    Abstract: A turn-around stage is provided that accepts the full current swing from an input stage while maintaining a low quiescent current. The circuitry provides Class AB operation with quiescent currents that are significantly less than the maximum signal current so that overall power consumption is significantly reduced. Also, the amount of noise and offset contributions of the circuit are reduced by reducing the transconductances associated with transistors included in the turn-around stage.
    Type: Grant
    Filed: December 20, 2002
    Date of Patent: September 23, 2003
    Assignee: National Semiconductor Corporation
    Inventors: Rudy G. H. Eschauzier, Nico van Rijn
  • Patent number: 6614637
    Abstract: A discharge interrupt circuit and method is directed to short circuit protection for an electronic circuit that includes a load regulation device that is arranged to normally provide an output current. The discharge interrupt circuit detects a short circuit condition by monitoring the voltage across the load regulation device. When a short circuit is detected, a logic circuit within the discharge interrupt circuit latches the short circuit condition in a memory circuit and disables the load regulation device such that the output current is interrupted from flowing. The logic circuit re-enables the load regulation device when the logic circuit has determined that the device has been deactivated. A time-out circuit can also be used add an additional delay between the load regulation device being disabled and re-enabled. The discharge interrupt circuit provides short circuit protection with power supply voltages less than 1V.
    Type: Grant
    Filed: July 20, 2001
    Date of Patent: September 2, 2003
    Assignees: National Semiconductor Corporation, Motorola, Inc.
    Inventor: Gregory J. Smith
  • Patent number: 6590518
    Abstract: An electronic circuit that converts an analog input to a digital signal includes a series “string” of resistors that provides reference signals with ascending values across the string. The reference signals are organized in banks of reference signals, with each adjacent set sharing a major code boundary. A coarse bank of comparators compare the analog input to the major code boundary reference signals and provide a coarse logic output. Each bank of reference signals has a corresponding bank of switches, with each switch associated with a particular reference signal in the bank. All of the switches in a particular bank are closed or opened in unison when selected. A particular bank is selected based on the coarse logic output signal. The reference values corresponding to the selected bank are coupled to a fine bank of comparators, each fine bank comparator comparing the analog input signal to one of the selected reference values.
    Type: Grant
    Filed: April 3, 2001
    Date of Patent: July 8, 2003
    Assignee: National Semiconductor Corporation
    Inventor: Robert Callaghan Taft
  • Patent number: 6583669
    Abstract: A turn-around stage is provided that accepts the full current swing from an input stage while maintaining a low quiescent current. The circuitry provides Class AB operation with quiescent currents that are significantly less than the maximum signal current so that overall power consumption is significantly reduced. Also, the amount of noise and offset contributions of the circuit are reduced by reducing the transconductances associated with transistors included in the turn-around stage.
    Type: Grant
    Filed: April 8, 2002
    Date of Patent: June 24, 2003
    Assignee: National Semiconductor Corporation
    Inventors: Rudy G. H. Eschauzier, Nico van Rijn
  • Patent number: 6541945
    Abstract: An apparatus and method for a regulator circuit includes multiple amplifier circuits, multiple bias stages, and a shunt stage. Each bias stage includes a set of MOS transistors with respective resistance circuits that are arranged to bias the shunt stage. The shunt stage includes a set of MOS transistor that are arranged to regulate a potential provided by a source circuit when active. Each amplifier circuit forms a regulation loop with a respective MOS transistor of the bias stage and a MOS transistor of the shunt stage. The multiple regulation loops provide redundancy. The regulation loops do not conflict with each other. Failures or defects within one of the regulation loops does not affect the remaining regulation loops in such a way that over-voltage results from the failure. The regulator prevents an over-voltage when at least one of the regulation loops is operable.
    Type: Grant
    Filed: December 13, 2001
    Date of Patent: April 1, 2003
    Assignee: National Semiconductor Corporation
    Inventor: Gregory J. Smith
  • Patent number: 6515523
    Abstract: A method and apparatus is directed to a power-on reset circuit for providing a power-on reset signal having a rising edge and an adjustable falling edge. A reference generator circuit produces two different reference signals in response to a power supply signal. The two reference signals are compared by a comparison circuit to produce a resulting reference signal. The resulting reference signal tracks the power supply signal until a first threshold potential is reached. When the first threshold potential is reached, a rising edge is produced in the power-on reset signal. The rising edge indicates that the power supply signal has reached an operating potential. A second threshold potential corresponds to the adjustable falling edge of the power-on reset signal. When the power supply signal decreases below the second threshold potential, the adjustable falling edge is produced in the power-on reset signal.
    Type: Grant
    Filed: May 23, 2001
    Date of Patent: February 4, 2003
    Assignee: National Semiconductor Corporation
    Inventor: Simon Bikulcius
  • Patent number: 6504347
    Abstract: An electronic circuit produces a measurement signal and a regulated power supply from a single common connection to a raw power supply signal. The electronic circuit can be used as a module in a power control circuit, such as a circuit for charging a battery cell. In an integrated circuit (IC), the electronic circuit has a single pin connection for accepting signals or connecting to elements external to the IC. The electronic circuit sub-regulates the potential at the common connection or node using a voltage regulator. The electronic circuit produces a measurement signal that corresponds to a potential of the unregulated power supply. A sense circuit measures a potential drop from the common connection to an internal node of the electronic circuit. The measurement signal corresponds to the drop in potential. The raw power supply signal can be calculated from examining the measurement signal. The measurement signal can be used by another circuit to generate one or more control signals.
    Type: Grant
    Filed: April 2, 2001
    Date of Patent: January 7, 2003
    Assignee: National Seminconductor Corporation
    Inventors: Gregory J. Smith, Francisco J. Guerrero Mercado