Abstract: A digital imaging system is described that provides techniques for reducing the amount of processing power required by a given digital camera device and for reducing the bandwidth required for transmitting image information to a target platform. The system defers and/or distributes the processing between the digital imager (i.e., digital camera itself) and the target platform that the digital imager will ultimately be connected to. The system only performs a partial computation at the digital imager device and completes the computation somewhere else, such as at a target computing device (e.g., desktop computer) where time and size are not an issue (relative to the imager). This image processing technique employs an efficient color conversion process, using a GUV color space. After an RGB mosaic (image) is captured, the image may be “companded” or quantized by representing it with less bits (e.g., companding from 10 bits to 8 bits).

Abstract: A method and apparatus for securing a secure processor is described. A plurality of spurious points are added to a biometric template. A received biometric data is matched to the biometric template. It is determined if the plurality of spurious points are present in the received biometric data. If the received biometric data matches the biometric template and the spurious points were not present in the received biometric data, access is granted to the secure processor.

Abstract: A method of writing data on a disk includes the step of writing a first subset of data on a disk such that an amount of write power to write the first subset of data is adjusted in a closed-loop operation. A write-power signal representing the amount of write power to write the first subset of data is measured. After a write interruption, such as from a buffer under-run, a second subset of the data is written on the disk in an open-loop operation using the measured write power, such that the second subset of data is adjacent to the first subset of data.

Abstract: In an embodiment, a method comprises receiving a hit rate and a change rate for a data object stored in a cache. The method also includes updating a time-to-live period for the data object stored in the cache based on the hit rate and the change rate for the data object.

Abstract: The present invention provides a method for breakpoint stepping a multi-bus device. The multi-bus device includes a breakpoint unit capable of detecting bus events on multiple busses. The breakpoint unit is originally programmed to break on the detection of a specified bus event on a bus selected from multiple busses. After the specified bus event has been detected and the device has entered one of several possible frozen states, the breakpoint unit may be programmed to detect a new bus event on a bus selected from multiple busses. The method is repeated as needed to achieve breakpoint stepping, including single stepping.

Abstract: The present invention provides a hardware breakpoint unit for a multibus, processor-based, configurable circuit. The multi-bus breakpoint unit connects to and allows tracing of multiple busses and includes the ability to break on the occurrence of a pre-determined bus event on any one of the multiple busses. The multi-bus breakpoint unit can be connected to and programmed by a host debugging system via a port on the target chip.