Abstract: In an integrated circuit structure, such as in an MCM or in an SCM, a particulate thermally conductive conformable material, such as a thermal paste, is applied between a heat-generating chip and a cooling plate. Modification of the microstructure of at least one of the two nominally parallel surfaces which are in contact with the material is provided in a discrete pattern of sloped recesses. The largest particles in the material preferentially migrate downward into the recesses. The average thickness of the conductive paste is reduced to below the diameter of the largest particles dispersed in the material, providing improved cooling.

Abstract: Inductor losses to a semiconducting substrate are eliminated in an IC structure by etching a well into the substrate down to the insulating layer coating the substrate and fabricating a grounded Faraday shield in the shape of elongated segments in the bottom of the well. The well lies directly below the inductor and is optionally filled with cured low-k organic dielectric or air.

Abstract: Disclosed is a multilayer integrated circuit structure joined to a chip carrier, and a process of making, in which the area normally occupied by a solid dielectric material in the IC is at least partially hollow. The hollow area can be filled with a gas, such as air, or placed under vacuum, minimizing the dielectric constant. Several embodiments and processing variants are disclosed. In one embodiment of the invention, the wiring layers, which are embedded in a temporary dielectric, alternate with via layers, also embedded in a temporary dielectric, in which the vias, besides establishing electrical communication between the wiring layers, also provide mechanical support for after the temporary dielectric is removed. Additional support is optionally provided by support structures though the interior levels and at the periphery of the chip. The temporary dielectric is removed subsequent to joining by dissolution or by ashing in an oxygen-containing plasma.

Abstract: Inductor losses to a semiconducting substrate are eliminated in an IC structure by etching a well into the substrate down to the insulating layer coating the substrate and fabricating a grounded Faraday shield in the shape of elongated segments in the bottom of the well. The well lies directly below the inductor and is optionally filled with cured low-k organic dielectric or air.

Abstract: Disclosed is a structure and process for incorporating air or other gas as a permanent dielectric medium in a multilevel chip by providing CVD diamond as a semi-sacrificial interlevel and intralevel dielectric material. The semi-sacrificial dielectric is subsequently at least partially removed in an isotropic oxygen etch. A variation of the disclosure includes providing a final, permanent CVD diamond encapsulant to contain the gaseous dielectric medium within the chip.

Abstract: Disclosed is a manufacturable silicon-based modular integrated circuit structure having performance characteristics comparable to high frequency GaAs-based integrated circuit structures, comprising materials and made in process steps which are compatible with existing low cost silicon-based integrated circuit processing.

Abstract: Disclosed is a manufacturable silicon-based modular integrated circuit structure having performance characteristics comparable to high frequency GaAs-based integrated circuit structures, comprising materials and made in process steps which are compatible with existing low cost silicon-based integrated circuit processing.

Abstract: Disclosed is a structure and process for incorporating air or other gas as a permanent dielectric medium in a multilevel chip by providing CVD diamond as a semi-sacrificial interlevel and intralevel dielectric material. The semi-sacrificial dielectric is subsequently at least partially removed in an isotopic oxygen etch. A variation of the disclosure includes providing a final, permanent CVD diamond encapsulant to contain the gaseous dielectric medium within the chip.

Abstract: Disclosed is a sculpted probe pad and a gray scale etching process for making arrays of such probe pads on a thin flexible interposer for testing the electrical integrity of microelectronic devices at terminal metallurgy. Also used in the etching process is a novel fixture for holding the substrate and a novel mask for 1-step photolithographic exposure. The result of the invention is an array of test probes of preselected uniform topography, which make ohmic contact at all points to be tested simultaneously and nondestructively.

Abstract: Disclosed is a solder injection mold apparatus and method for providing solder balls to a printed circuit board substrate using the solder injection mold apparatus in the plastic ball grid array (PBGA). The solder mold through holes are chamfered at entry and at exit ends to assist in receipt of molten solder and the formation and transfer of solder balls to lands on the substrate. A blind recess is provided in the second major surface of the mold, i.e. the side facing the substrate, in order to accommodate electronic components mounted thereon. Solder balls are delivered and metallurgically affixed to the lands in a process that requires only one reflow, leaving the through holes clean of solder and the mold ready for reuse. The material of which the substrate, mold and base plate are comprised is selected to be non-wettable by solder and mutually compatible with respect to CTE when exposed to temperatures of molten solder.

Abstract: Disclosed is a solder injection mold apparatus and method for providing solder balls to a printed circuit board substrate using the solder injection mold apparatus in the plastic ball grid array (PBGA). The solder mold through holes are chamfered at entry and at exit ends to assist in receipt of molten solder and the formation and transfer of solder balls to lands on the substrate. A blind recess is provided in the second major surface of the mold, i.e. the side facing the substrate, in order to accommodate electronic components mounted thereon. Solder balls are delivered and metallurgically affixed to the lands in a process that requires only one reflow, leaving the through holes clean of solder and the mold ready for reuse. The material of which the substrate, mold and base plate are comprised is selected to be non-wettable by solder and mutually compatible with respect to CTE when exposed to temperatures of molten solder.

Abstract: The adhesion of chromium-copper layer to polyimide has been greatly improved by a method which provides controlled reduction, rather than total elimination, of water content in the polyimide. The electronic packaging device which incorporates the flexible circuit prepared by the method exhibits greatly improved reliability. It is believed that the invention can be used to improve the adhesion between other organic materials having moisture affinity and materials comprising in-organics or between two organic materials.

Abstract: Process is described for applying large quantities of solder to small areas, such as the lands in a high density card, to which it is intended to surface mount electronic devices or directly attach circuitized chips. The land area is temporarily extended by depositing a relatively thin layer of metal beyond the perimeter of the land, wave soldering to deposit excess solder on the extended land region, and reflow, whereby the thin layer of metal dissolves into the solder, causing the solder to retract to the dimensions of the original land. Because the volume of solder is increased, the strength and reliability of the solder joint is greatly improved.

Abstract: A method is disclosed of simultaneously laminating circuitized dielectric layers to form a multilayer high performance circuit board and making interlevel electrical connections. The method selects two elements which will form a eutectic at one low temperature and will solidify to form an alloy which will only remelt at a second temperature higher than any required by any subsequent lamination. The joint is made using a transient liquid bonding technique and sufficient Au and Sn to result in a Au-Sn20wt% eutectic at the low temperature. Once solidified, the alloy formed remains solid throughout subsequent laminations. As a result, a composite, multilayer, high performance circuit board is produced, electrically joined at selected lands by the solid alloy.

Abstract: An optoelectronic assembly which provides for enhanced alignment between the internal components thereof. The assembly includes a housing having a base portion and a cover portion, the housing including therein a circuitized substrate. A pair of optoelectronic devices (transmitter and receiver components) are initially movably (loosely) positioned within the housing. The invention utilizes an alignment member which is secured to the housing while positively engaging the movably positioned devices and precisely align these devices with respect thereto such that these devices are in turn precisely aligned with optic means (e.g., a duplex optical connector) when the optic means is positioned within the alignment member. In one embodiment, the housing is of metallic material while the alignment member is a molded plastic structure. The alignment member may also include shutter means therein for safety purposes.

Abstract: Composition and solder interconnection structure for its use, wherein the gap created by solder connections between a carrier substrate and a semiconductor chip device mounted thereon is filled with the solvent free formulation obtained by curing a preparation containing a cycloaliphatic polyepoxide and/or curable cyanate ester or prepolymer thereof, polyol, and filler which is substantially free of alpha particle emissions.

Abstract: An electrical interconnection, which includes a method for fabricating the device, is disclosed. The interconnection comprises two contact surfaces, on at least one of which is disposed at least one solid metal conical projection in predetermined dimension and location. Rather than necessarily being permanently cojoined, the contact surfaces are attachable and detachable when desired. The conical projections on one contact surface make ohmic contact, either by wiping with an intermeshing like structure on a second contact surface or by contacting a second contact surface which is a substantially flat contact pad. An interconnection, in this invention, is the combination of at least one contact having individual conical projections and another contact, optionally having individual conical projections. The conical projections are formed in metal by electrochemical machining in neutral salt solution, optionally in a continuous foil. The conical projections are also optionally formed on the head of a contact pin.

Abstract: The illumination system as a part of an optical inspection system, the total inspection system itself, and the method of illuminating and inspecting a workpiece. The illumination system is computer controlled as to a level of intensity and adjustable as to angle of incidence. The illumination system includes illumination control electronics, a quad quartz halogen lamp array light source, a fiber optic line converter and an illumination collection system, having a collimator lens array and a focusing/field coverage lens. As a result of the present invention, determinations of false defects on the PCB are minimized. Human contact with the PCB is also minimized and the rate of inspections performable is increased.

Abstract: Disclosed is a pin feeder for supplying contact pins in a high density interstitial pattern in a printed circuit carrier. The feeder apparatus eliminates the use of tubes, and features instead vertical vibration in combination with a honeycomb feeder plate configuration, thereby providing a process and apparatus for pin feeding with greatly improved reliability, reduced jamming and greater flexibility in its applications.

Abstract: A method of making an electrical contact comprised of at least one, and preferably several, conical projections, is provided. The individual conical projections are comprised of an ablative material, and at least some of the conical projections include a surface which is substantially comprised of material in a thickness capable of making ohmic contact, either by wiping with an intermeshing like structure or by contacting a substantially flat contact pad. An interconnection, in this invention, is the combination of at least one contact having individual conical projections and another contact, optionally having individual conical projections. The conical projections are formed by laser. The conical projections are optionally formed on the head of a contact pin.