Patents Represented by Attorney, Agent or Law Firm Juichi Mimura
  • Patent number: 6335646
    Abstract: A power-on reset circuit includes a capacitor, an inverter, a resistor and first and second transistors which are connected in series between a power supply line and ground. The electric current flowing through the resistor flow through the first and second transistors with a certain time delay because of an electric charge stored in the capacitor. A rising of a power supply voltage is applied to the inverter with a certain time delay when the power supply voltage goes up. According to the power-on reset circuit, a reset pulse can be generated regardless a speed of rising of the power supply voltage.
    Type: Grant
    Filed: April 19, 2000
    Date of Patent: January 1, 2002
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Shigeru Nagatomo