Abstract: An electronic measurement apparatus and method provides for an instrument requiring at least one periodic calibration. The instrument has an instrument processor and an instrument memory. The instrument is configured to accept and store calibration data related to the periodic calibration. The instrument is further configured to maintain a calibration history of the calibration data in the instrument memory.

Abstract: A method and apparatus for collecting digital sample data from a target system accesses the digital sample data at transitions of a sample clock, acquires information related to an instantaneous average period of the sample clock, and records the digital sample data and the information related to the instantaneous average period of the sample clock.

Abstract: A displacement measurement apparatus includes a light source, a splitter grating, a measurement grating, and first a second detector arrays. The splitter grating splits a light beam into first and second measurement channels that each illuminates the measurement grating. The first and second measurement channels split into 0th and 1st order diffraction products at the measurement grating in a first pass and recombine at the measurement grating in a second pass before being measured at the first and second detector arrays.

Abstract: An apparatus and method includes an integrated circuit disposed in a ball grid array (“BGA”) package having interconnects on at least one corner without signal assignments.

Abstract: An apparatus and method for measuring displacement includes a light beam directed to an interferometer core that splits the light beam into first and second component beams. The first component beam is directed to a diffraction grating at approximately a Littrow angle. A diffraction is received by the interferometer core and is combined with the second component beam. The combination of the first and second component beams is measured to determine displacement of the diffraction grating.

Abstract: A refractive optical system may be a collimator, focusing optical system, reducer, or expander and includes an entrance optical element, an exit optical element, and a volume disposed between the entrance and exit optical elements. The volume is configured to have an index of refraction that is insensitive to changes in atmospheric conditions of the ambient environment. A surface of curvature of an input surface of the entrance optical element is parallel to a wavefront curvature of an input light beam and an output surface of the exit optical element is parallel to a wavefront curvature of an exit light beam. Accordingly, the wavefront curvature of the exit light beam is insensitive to the ambient environment permitting the production and operation environments to change without a change to the performance of the optical system.

Abstract: An apparatus and method for synchronous communications using a serial data stream employs a housing with a controller and a back plane. The housing accepts one or more modules for interconnection with the back plane. The back plane distributes power to the modules and provides a communication link from the controller to each module. Each communication link includes a data out line, a data in line and a clock line, where each clock line is derived from one clock source.

Abstract: A probe apparatus has first and second access ports and a measurement port. The first and second access ports are adapted to be interposed in a test circuit. A voltage amplifier and a voltage splitter are adapted to present the second access port and the measurement port each with a voltage representative of a voltage received by the first access port.

Abstract: A method of mapping device pins to logic analyzer channels in preparation for a digital test includes accepting a correlation of at least one test connector to one or more logic analyzer pods and presenting a display showing available test connector pins for each defined test connector. A user may then select a one to one assignment of one or more signal pins to the test connector pins to establish a mapping configuration.

Abstract: A method, apparatus and article of manufacture for manufacturing a balanced circuit obtains S-parameters for the balanced circuit and determines a delay value embedded at one of the single-ended terminals of the balanced circuit that reduces a differential to common mode conversion mixed-mode transmission S-parameter.

Abstract: A method and apparatus for characterizing a non-linear device stimulates the device with a repetitive digital signal and uses relative phase measurements made with a vector network analyzer to measure the device response to the digital stimulus.

Abstract: A method of measuring a DUT provides a vector network analyzer with at least two measurement ports and measures characteristics of thru, reflect, and line calibration standards at the measurement ports. Error coefficients are calculated as well as a shifted electrical length attributable to the measured calibration standards. S-parameters of the DUT are measured and corrected based upon the error coefficients. A reference plane is shifted for each element of the corrected S-parameter matrix to a measurement reference plane, and ? SA_portn ? LA_portm = S 21 ? _thru ? _nm ? S 12 ? _thru ? _nm wherein S21—thru—nm is equal to S12—thru—mn and an argument of both solutions for S21—thru—nm is fit to a straight line, the solution having a y-intercept closest to zero being a correct solution and a resulting argument of the correct solution being the electrical delay.

Abstract: A method and apparatus for calibrating a multiport measurement path using through, high reflect and line calibration standards presents the through standard between no more than N?1 other pairs of measurement ports where at least one of the other pairs is a proximal pair.

Abstract: A packaged IC includes an IC die with signal and signal complement traces positioned relative to each other to maximize broadside coupling for a matching impedance. The signal and signal complement traces are electrically connected to transmission or receive channels of the IC die. Use of a broadside coupled trace configuration alleviates routing congestion in an IC package and permits an IC to accommodate a greater number of channels within a given surface area than is possible under the prior art.

Abstract: A method and apparatus permits use of a tester memory (31) as storage for an inversion mask. The inversion mask indicates to the tester which cells in a DUT memory (14) are logically inverted during testing. Data information and the inverse of the data information is input into a first data multiplexer (802). The stored inversion mask (902–908) is used to independently select a data information bit or its inverse for presentation as a masked output (814) at the output of the first data multiplexer (802).

Abstract: An apparatus to perform no-latency conditional branching has a sequencer for executing program instructions including one or more conditional branch instructions. The conditional branch instruction is a binary word specifying a branch condition address and a conditional instruction. The branch unit has a programmable flag selection memory and a plurality of first flag selectors and determines in hardware whether to branch according to the conditional instruction. Each first flag selector accepts a plurality of available flags and selects a flag based upon contents in the flag selection memory. A second flag selector accepts the flags from the first flag selectors and selects one of the flags to present as a branch flag based upon the branch condition address. The branch flag indicates whether to branch to the destination address.

Abstract: A method for cooling integrated circuit assemblies uses a heat sink having a base and a displacement element having a size substantially similar to an area of heat concentration appropriately positioned on the integrated circuit. A compressive force placed upon the displacement element between the heat sink and the integrated circuit provides an optimum thermal resistance at an interface between the IC and the heat sink for efficient transfer of heat to the heat sink.

Abstract: A method, apparatus and article of manufacture to aid in the characterization of a device establishes a device S-parameter matrix (SD) to represent electrical behavior of the device, an adapter T-parameter matrix (Ta) to represent all possible electrical paths through circuits to all device ports of the device, and a cascaded S-parameter matrix (Sc) to represent the circuits cascaded with the device. Values for the adapter T-parameter matrix are obtained either through measurement or modeling. The device cascaded with the circuits is measured to obtain values for the cascaded S-parameter matrix, permitting use of a general solution for the device S-parameter matrix as a function of the adapter T-parameter matrix and the cascaded S-parameter matrix.

Abstract: A method and apparatus for measuring a multiport device using a multiport test set connects one port of the multiport device to a stimulus signal and terminates all remaining ports in a respective load. A response to a stimulus signal is measured on all ports of the multiport device and the measured responses are corrected with calibration data to characterize the multiport device.

Abstract: An apparatus for routing electrical signals is a layered structure having a signal trace connected to a via and to a conductive stub trace on a first side. A reference layer is on a second side of the layered structure. Removing a portion of the conductive reference layer in an area of the stub strace increases the impedance of the stub trace without changing the impedance of the signal trace thereby improving an impedance match to another electrical element to which the apparatus is connected.