Abstract: A method of allocating available bandwidth between stations configured in a write token controlled loop communications network. When a station desires to reserve additional bandwidth to itself, it captures the write token and transmits a bandwidth allocation token which includes a field indicating the originating station's amount of currently reserved bandwidth. Each station on the loop adds to the field the amount of its currently reserved bandwidth. When the allocation token arrives back at the originating station, the write token is regenerated and transmitted. If the total amount of currently reserved bandwidth indicated in the allocation token plus the desired additional bandwidth sought to be reserved is less than the allocatable bandwidth, then the reservation is granted. The additional bandwidth desired is then added to the total reserved by the originating station.

Abstract: The present disclosure describes a latch assembly wherein structural members are coupled to each other by an electric match-type device interposed therebetween. The latter device generally comprises a body portion having electrical connections thereto and a rigid mass of combustible material firmly adhered to an extremity thereof. At least a pair of the structural members are individually coupled to the combustible material. Remote activation of the match by the passage of electric current therethrough results in the firing of the combustible material and the consequent opening of the latch through the elimination of the coupling force between the structural members.

Abstract: The present invention describes an extraction device for removing components, such as leaded integrated circuit packages, from a printed circuit board to which their leads are soldered. The device, under operator control, is designed to captivate the component and to apply to it an extraction force which has a predetermined magnitude independent of the operator's judgment. Accordingly, when all of the component solder joints at the printed circuit board have been sufficiently reflowed, the device automatically withdraws the component from the board into itself. Damage to the board or the component as a result of the extraction process is virtually eliminated through the use of the device.

Abstract: A very large scale integrated circuit, covering the entire surface of a semiconductor wafer, comprises a plurality of data processing cells and a port. Starting at the port, cells can be made to couple to neighboring cells which are then tested and incorporated into the overall working of the integrated circuit if functional to grow a functional array of interconnected cells on the wafer.Each cell is square and comprises a data processing element, four coupling sections and four link sections. The link sections allow the cell either to communicate with one of its four neighbors or to internally circulate data. The coupling sections join the link sections. The data processing element is associated with one of the link sections. The cells are divided into two groups, a first group with its cells all having the element associated with the coupling section in one corner and a second group with its cells all having the element associated with the coupling section in the opposite corner.

Abstract: The present disclosure describes test coupons having predetermined respective test patterns, formed in a multilayer printed circuit board simultaneously with the fabrication of the latter. The test coupons are probed with conventional electrical instruments to provide information as to the occurrence of a misregistration of any given subsurface printed plane or trace, whether or not the misregistration exceeds a specified limit, and if desired, a measure of the degree of misregistration. The foregoing are readily accomplished in a time and cost efficient manner without the need for cross-sectioning portions of the board and the visual observation of the subsurface printed layers.

Abstract: An encoder/decoder is described which allows data transmission on an A.C. coupled transmission system. The encoder converts a serial data stream comprised of combinations of logical "1"'s and "0"'s in an NRZ format to an output pulse train. The latter is characterized not only by phase reversal for each bit of data, as required for A.C. coupled systems, but by bit durations which are dissimilar for a logic "1" and "0". The encoded data is transmitted and subsequently applied to the decoder which restores the data to an NRZ format, and provides a corresponding series of clock pulses for interpreting the data. The encoder/decoder may be implemented in a simple logic configuration.

Abstract: This disclosure relates to a network of reduction processors for the evaluation of one or more functions which are stored in memory in the form of a series of nodes of a treelike graph where the nodes implement a variable-free applicative language. The respective function operators are reduced through a progressive series of transformations or substitutions until a result is obtained. During the reduction process, the processor transfers nodes to and from memory and performs various operations as required on those nodes. The processor can also create new nodes in memory and delete unused ones.

Abstract: The present disclosure describes a universal leadless chip carrier mounting pad layout for an interconnection medium such as a printed circuit board, which accommodates a wide range of chip carrier sizes. Thus, there is eliminated the traditional method of providing custom pad layouts homologously configured as to numbers of pads and their arrangement, in specific chip carriers. The universality of the present pad layout makes it especially desirable for prototype designs, and integrated circuit chip "burn in" and test procedures.

Abstract: Disclosed is an electrostatic ink jet printing system which provides improved frequency response of the mass flow of ink deposited on a recording medium. In accordance with the invention, an ink jet nozzle is conductively connected to an ink reservoir. A conductive platen maintained at a reference voltage level is positioned in front of the nozzle. A sheet of paper is positioned on the surface of the platen. Positioned between the paper and nozzle is a conductive plate having an aperture through which ink emanating from the nozzle is directed.A video data signal input to the system is amplified and biased before being applied to the nozzle. At the same time, the video data signal is also inverted, then fed through a differentiator and finally amplified before being applied to the conductive plate. As a result of the voltage signals applied to the nozzle and plate, a unique electric field is generated between the tip of the nozzle and the plate.

Abstract: A four way arbiter switch for a five port module as a node in an asynchronous speed independent network of concurrent processors, each port of the module including an input selector switch and an output selector switch such that each selector switch has a plurality of output channels one for each of the output arbiter switches (except the arbiter switch associated with its own port). Each selector switch is adapted to select a particular output channel (arbiter switch) according to the initial bits received in the asynchronous speed independent message. In this manner, the module of the present invention can accommodate up to five simultaneous asynchronous message transmissions without nodal blocking although the average number of simultaneous messages that can be accommodated will be less.

Abstract: A replaceable cartridge for use in an electrostatic ink jet printer includes not only a sealed ink supply, but the ink jet itself. The cartridge forms part of a printer head which is mounted to move transversely back and forth across the width of a recording paper.The cartridge includes an ink reservoir which is divided into two compartments by a ramp-shaped structure, one end of the first compartment formed by the perpendicular end of the ramp, the ink jet mounted to a wall of the first compartment. The head's transverse movement serves to shift ink from the second compartment up the ramp and into the first compartment where it is trapped by the perpendicular end of the ramp. As a result, the ink supply to the jet is maintained at a constant optimum level as ink is dispensed from the jet.The cartridge additionally includes a venting mechanism which allows air to replace ink which has been dispensed from the jet.

Abstract: A disposable electrostatic ink jet cartridge forms part of a printer head which is mounted to move transversely back and forth across the width of a recording paper. The cartridge includes an ink jet nozzle and multicompartment ink reservoir, one compartment supplying the ink jet nozzle with ink. As printing occurs, the head height of ink supplying the ink jet nozzle decreases. In order to restore proper height height, as the head moves in one direction, an external fixed cam engages a leaf spring connected to the cartridge, causing a connected float to displace ink contained in the other reservoir compartment. The displaced ink is forced over a dividing wall in the reservoir into the compartment on the front of which is mounted the ink jet nozzle. As the head reverses direction, the cam is disengaged from the leaf spring, thus restoring the float to a raised position.

Abstract: In a named data processing system having a plurality of memory modules, each module therein having a plurality of locations for storing data pages and the like, a memory address translation apparatus and method translates a data job name and associated segmented address field into a memory module-page addressing pair wherein each and every storage location may be accessed by each and every job name. The job name and the associated segmented address field are each partitioned into most and least significant bit fields. Through translation a storage location is defined by the exclusive ORing of the least significant fields of the data job name and segmented address field. Likewise a memory module is defined by the exclusive ORing of the most significant fields of the job name and the segmented address field as permuted by an exclusive ORing with the least significant field of the segmented address field.

Abstract: Disclosed is a synchronous clock regenerator for generating a clock signal which can be reliably used to strobe a binary serial data signal. The incoming raw clock signal is fed into a tapped delay line which generates multiple delayed versions of the raw clock signal. Upon detection of a framing transition on the incoming data signal, the raw clock signal and multiple delayed clock signals are latched. The latched values are used to address a read only memory (ROM), the ROM containing codes specifying which, if any, of the set including the raw clock signal and multiple delayed clock signals provides the optimum phase to strobe the incoming data signal. The code read from the ROM is decoded, latched and fed to a l-of-n selector circuit.

Abstract: A high speed parallel array data processing architecture fashioned under a computational envelope approach includes a data base memory for secondary storage of programs and data, and a plurality of memory modules interconnected to a plurality of processing modules by a connection network of the Omega gender. Programs and data are fed from the data base memory to the plurality of memory modules and from hence the programs are fed through the connection network to the array of processors (one copy of each program for each processor). Execution of the programs occur with the processors operating normally quite independently of each other in a multiprocessing fashion. For data dependent operations and other suitable operations, all processors are instructed to finish one given task or program branch before all are instructed to proceed in parallel processing fashion on the next instruction.

Abstract: A micro-sequencer allowing multiple decisions to be made in one instant of time is disclosed. A multiplexor array is employed to generate a multiple output condition code from inputted test conditions. The generated condition code is concatenated to a base pointer field of the currently executing microinstruction, and the result is used to address a next state table. The output of the next state table is the address of the microinstruction to be executed next if the then currently executing microinstruction specifies a jump operation.

Abstract: The apparatus is an improved web processor, which operates at a high web speed, and can achieve variable document lengths with only programmable changes. To achieve this result the web processor uses an improved tool and web drive control. The tool control insures that the tool contacts the web once per document length. The web drive control varies the web speed to mate with the tool during impact and then speed up or slows down the web to maintain a constant speed throughout the processing unit.

Abstract: A timed token protocol for use in a local area loop communications network is disclosed. The protocol provides three classes of service with a priority relationship between classes. The three classes allow guaranteed bandwidth, interactive and batch services. The classes are implemented by timing the rotation time of a write token to measure instantaneous load. Transmission of information is limited by class of service and the measured write token rotation time.Also disclosed is a hardware embodiment of a loop communications station which implements the timed token protocol.

Abstract: A memory mapping unit enables different sized memory boards to be mapped in any order into any size memory address boundary in a microprocessor. Any 2.sup.K sized memory board (where N.ltoreq.K.ltoreq.M) can be mapped to any 2.sup.N address boundary. To accomplish this, a binary adder adds the 2's complement of the base address register with significant bits from the address buss. A series of logic gates are connected to the output of the binary adder and a board size mask register. The logic gates perform an "AND" operation on the output from the binary adder and the board size mask register. The outputs from the logic gates connect to a multiple input "NOR" gate. When all the inputs are logical "zero", indicating the address is on the board, a board enable command is produced which activates the memory board transceiver.

Abstract: A large area button in an electrical keyboard is prevented from jamming by being stabilized against tilt which results from depressive forces being applied remotely from the center of the button, the stabilization being achieved by the provision of two anti-roll bars attaching the button to the body of the keyboard and each preventing deviation of one of two axes of the button from being orthogonal both to one another and to the direction of depression of the button.