Patents Represented by Attorney Kauth, Pomeroy, Peck & Balley LLP
  • Patent number: 8001174
    Abstract: An application process to process communication system is provided in which seamless communication between onboard processes and off-board processes are provided. The off-board processes are typically remote and/or mobile relative to the onboard processes in which a central process maintains communication between the processes.
    Type: Grant
    Filed: December 16, 2008
    Date of Patent: August 16, 2011
    Assignee: Calamp Corp.
    Inventor: Somasundaram Ramiah
  • Patent number: 7738677
    Abstract: Systems and methods are described for rendering information to be embedded in media content at a first location and for embedding the rendered information into the media content at a second location. In many embodiments, the embedding process is less processor intensive than the rendering process and can be performed on a consumer electronics device such as a set top box, using existing processing mechanisms. One embodiment of the invention includes rendering the information into an image at a first location and embedding the image in the media at a second location in order to achieve efficient marking of the media content.
    Type: Grant
    Filed: May 16, 2007
    Date of Patent: June 15, 2010
    Assignee: Verimatrix, Inc.
    Inventor: Niels Thorwirth
  • Patent number: 7730613
    Abstract: Methods of manufacturing printed wiring boards including electrically conductive constraining cores that involve a single lamination cycle are disclosed. One example of the method of the invention includes drilling a clearance pattern in an electrically conductive constraining core, arranging the electrically conductive constraining core in a stack up that includes B-stage (semi-cured) layers of dielectric material on either side of the constraining core and additional layers of material arranged to form the at least one functional layer, performing a lamination cycle on the stack up that causes the resin in the B-stage (semi-cured) layers of dielectric to reflow and fill the clearance pattern in the electrically conductive constraining core before curing and drilling plated through holes.
    Type: Grant
    Filed: March 6, 2007
    Date of Patent: June 8, 2010
    Assignee: Stablcor, Inc.
    Inventor: Kalu K. Vasoya
  • Patent number: D613940
    Type: Grant
    Filed: April 24, 2008
    Date of Patent: April 20, 2010
    Inventor: Jonathan Colwell