Patents Represented by Attorney Keith L. Hargrove
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Patent number: 5835692Abstract: A video imaging system and method that allow a user to manipulate an image displayed on a video display are disclosed. The video display includes a mechanism that controls a portion of a virtual display area to be shown on the display. The video imaging system and method of the present invention include a virtual display that is mappable to an actual video display. A mapping notation is provided to allow for a virtual three-dimensional orientation or mapping notation icon, which allows the user to control which portion of the virtual image area is displayed with respect to the entire virtual image area. The mapping notation icon is manipulated, by a device, such as a mouse or trackball, to allow the user to manipulate the virtual image area to display another portion of the virtual image area.Type: GrantFiled: March 24, 1997Date of Patent: November 10, 1998Assignee: International Business Machines CorporationInventors: Brian J. Cragun, Michael D. Mitchell
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Patent number: 5568611Abstract: An information processing system comprises a system processor, an information storage circuit for storing at least programs for operating the information processing system; an enclosure for enclosing the information processing apparatus, the enclosure including an opening for providing access to the information processing system; a cover attached to the enclosure, the cover providing an open position and a closed condition for the information processing apparatus; detection circuitry for detecting whether the cover is in the open position; and means for stopping information processing by the information processing system responsive to an indication that the cover is in the open condition.Type: GrantFiled: July 29, 1994Date of Patent: October 22, 1996Assignee: International Business Machines CorporationInventors: Bharat Khatri, Fred Marx, Dan E. Mayer, Cynthia M. Merkin, Ileana Vila
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Patent number: 5565982Abstract: A time resolved spectroscopy system and method are provided using digital processing techniques of a low power, continuous wave signal generated by a continuous wave light source, such as a cw laser. Time elapse is determined by measuring the time shift of the signal modulation sequence using the cross correlation of a return signal with the reference signal. The high resolution time delay is introduced at the start of each modulation cycle and the high resolution measurement is constructed by interlacing a data set based on the delay information. The high resolution TRS or fluorescence measurement is achieved by correlation calculation of the measured data and the reference code and deconvolving the autocorrelation function of the reference code.Type: GrantFiled: May 31, 1994Date of Patent: October 15, 1996Assignees: Recon Exploration, Science & Engineering Services Inc.Inventors: Hyo S. Lee, Anthony Notari
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Patent number: 5561740Abstract: A method and system for providing representation of multiple entities in a single multiple-instance object is disclosed and provides a powerful and economical way of representing objects in an object oriented knowledge based data processing system. A multiple-instance object contains slots and slot values which enable the access and modification of all entities represented by the multiple-instance object. The instance unique data, the context which defines an instance state, and the procedure to instantiate the multiple-instance object are all stored in the multiple-instance object. The processing or reasoning of the knowledge based system occurs as though objects exist for entities represented.Type: GrantFiled: December 13, 1994Date of Patent: October 1, 1996Assignee: International Business Machines CorporationInventors: Kevin L. Barrett, Ajit T. Dingankar, Tien N. Le
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Patent number: 5557725Abstract: A method of selecting which user has the input focus, and conditions by which a different user will get the input focus in the future. A user is said to have the `floor` if that user is enabled to become the input focus, or in other words, to provide input to the shared application. Zero or more users may have the floor at a particular time. (This is in contrast to a human conference or meeting where generally one person has the floor at a time). A method of selecting the set of users who have the floor is called a floor control policy. The floor control policy determines the set of participants who have the floor now, who will get the floor next, and how and when the floor assignments are made.Type: GrantFiled: February 13, 1995Date of Patent: September 17, 1996Assignee: International Business Machines CorporationInventors: Catherine M. Ansberry, Jay D. Freer, Todd W. Fuqua, Erik P. Mesterton, Catherine A. Stillwagon, Ching-Yun Yang
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Patent number: 5555543Abstract: A computer networking system includes a cross bar switch and a protocol for operating the same. The crossbar switch typically connects a plurality of ports one to another and the protocol establishes a connection between a first desired port and a second desired port selected from the plurality of ports. Each port further connects to a compute element via a master bidirectional bus and a slave bidirectional bus. Any of the compute elements can serve as either a master or slave to any other compute element connected to the crossbar switch. A master port connects the bidirectional bus to the crossbar switch and a slave port connects the slave bidirectional bus to the crossbar switch. The master port is reserved for compute element initiated operations while the slave port is reserved for network initiated operations.Type: GrantFiled: January 3, 1995Date of Patent: September 10, 1996Assignee: International Business Machines CorporationInventors: Gregory F. Grohoski, Oscar R. Mitchell, Tung M. Nguyen, Yongjae Rim
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Patent number: 5544008Abstract: An expansion module for use in a computer system is disclosed. The expansion module holds a first card, which has a data processing unit and associated memory coupled together via a high speed internal local bus and an external coupler for an external peripheral device. An expansion coupler is also provided for coupling a second expansion card to the first card. The expansion module has a system connector for connecting the expansion module to a lower speed input-output bus of a computer system. The module can also accommodate additional SIMM modules as its associated memory. The module uses sidewalls or book covers made of a shielding material to provide electrical shielding and protection from external conditions. The expansion module improves the upgradeability and expandability of a data processing system.Type: GrantFiled: June 30, 1994Date of Patent: August 6, 1996Assignee: International Business Machines CorporationInventors: Roger F. Dimmick, Gary A. Fitterer, Jeff A. Jajowka, William F. Otto, Jerry R. Rasmussen, Terry L. Sobotta
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Patent number: 5544005Abstract: A keyboard housing structure is disclosed that includes a keyboard housing section for housing a keyboard body and a cable housing section for housing a cable. The cable is connected at one end to the keyboard body which is movable in the cable housing section along a housing direction in a pull-out direction. The other end of the cable is moveable in the housing direction within the cable housing section when housing the keyboard body in the keyboard housing section. Further included is a cable side connector, which is provided on the other end of the cable. A storing section side connector is detachably connected to the cable side connector and is housed in the cable housing section in such a manner as to be movable along the housing direction and the pull-out direction. The cable side connector is latched by a latch when the store section side connector is at a predetermined position in the pull-out direction in the cable housing section.Type: GrantFiled: July 7, 1994Date of Patent: August 6, 1996Assignee: International Business Machines CorporationInventors: Seita Horikoshi, Mikio Kurihara, Atsuhisa Naitoh, Kazuhide Yoshihara
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Patent number: 5539332Abstract: An evaluation tree circuit is disclosed that produces a generate, a propagate, and a zero output for use in carry lookahead adders. Another evaluation tree circuit is disclosed that merges the generate, propagate, and zero signals from several adjacent bits or groups of bits. These evaluation trees may be used in self-resetting CMOS or CVSL circuits. They can be used to reduce the number of levels of logic in a carry lookahead adder. They can also be used to form a magnitude comparator, which is also disclosed.Type: GrantFiled: October 31, 1994Date of Patent: July 23, 1996Assignee: International Business Machines CorporationInventor: Martin S. Schmookler
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Patent number: 5537330Abstract: A method within a logic synthesis system provides for using tags attached to the nodes in a parse string generated from an abstract description of a logic design to classify portions of a heterogeneous design as open control, structure dominant, or direct map. The classification is then used to govern the amount of optimization allowed during logic synthesis. The classification is further used to seed or bypass the covering algorithms to produce the technology implementation desired by the designer. Structure dominance is a technique for "seeding" patterns by a designer which best fit the structure to the technology, which implies that the structural representation of the design as entered by the designer dominates the patterns located by the covering algorithm. However, other pattern matching functions are allowed to find better matches, if they exist, and the covering algorithm is allowed the final choice.Type: GrantFiled: June 10, 1994Date of Patent: July 16, 1996Assignee: International Business Machines CorporationInventors: Robert F. Damiano, Anthony D. Drumm, Michael K. Edwards, Robert L. Kanzelman, Kathy M. McCarthy
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Patent number: 5530887Abstract: Data processing apparatus performs automatic hardware device identification and system setup in computer systems that have a Programmable Option Select (POS) feature, where the system includes multi-card adapters (adapters with attached daughter card(s)), and/or multi-card planar complexes (system boards with pluggable processor complexes and/or I/O risers). In particular, the apparatus uniquely identifies the aforementioned multi-card devices utilizing unique "combination type" POS IDs, where a combination type POS ID is a POS ID specifically preassigned to a combination of cards rather than to a single type of card. According to the invention, the unique combination type POS ID is partitioned across the combination of cards (for example, hardwired into each card). When the cards are combined, the partitioned ID is synthesized and becomes available to the system.Type: GrantFiled: February 28, 1994Date of Patent: June 25, 1996Assignee: International Business Machines CorporationInventors: Jeffrey D. Harper, James C. Peterson, James D. Touchton, Wendel G. Voigt, Gregory M. Vrana
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Patent number: 5528601Abstract: An improved test circuit and method for integrated circuits are disclosed. The test circuit uses a level sensitive scan design for use with a multiplexor having a plurality of pass gates. The test circuit includes a plurality of latches, each having a functional input, a scan input and an output. The outputs are coupled to the multiplexor pass gates. A first set of mutually exclusive, or orthogonal, signals is placed on the functional inputs of the latches for selecting one of the pass gates. A signal encoder is used to form a reduced set of signals, based on the first set of signals. The reduced set of signals is further modified by a modifying means, such as a shift register. The modified signal is then decoded by a decoding means for generating the next set of orthogonal signals placed on the scan inputs. Also, an output signal is then transmitted as an evaluation signal to confirm the accuracy of the integrated circuit.Type: GrantFiled: September 16, 1994Date of Patent: June 18, 1996Assignee: International Business Machines CorporationInventor: Martin S. Schmookler
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Patent number: 5528033Abstract: A method for automatically providing a surface profile analysis of a submicron device using a microscope system typically used to measure critical dimensions of the submicron device is disclosed. The method generates a data point array that is linearly interpolated along a particular scan line measured. The system then calculates an angle for performing a rotational correlation then rotates the measurement profile from the scan line to an absolute horizontal position based on this rotational correlation angle. Next, the system separates the scan line into independent subset features having line and trench features. The number of these line and trench features are then determined in the scan line and using the data point array, the system then calculates the height, width, and angle for each subset feature in that scan line.Type: GrantFiled: March 29, 1995Date of Patent: June 18, 1996Assignee: International Business Machines CorporationInventors: Jiann-Chang Lo, Timothy J. O'Leary
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Patent number: 5526314Abstract: A sense amplifier apparatus for use in a memory array having a plurality of memory cells is provided. The sense amplifier apparatus includes a differential sense amplifier and a dynamic sense amplifier. The differential sense amplifier has a first set of switches for driving the voltages of the sense amplifier apparatus and are coupled to a complementary pair of outputs. Also provided are a second set of switches, which are coupled to a complementary pair of input lines so as to amplify the input signal on either of the pair of input lines to a first signal level at a first rate of amplification. The dynamic sense amplifier shares the first set of switches with the differential sense amplifier and further includes a third set of switches that are coupled to a complementary pair of input lines and the output lines and also a sense enable line. This allows the first signal level to be amplified to a second signal level at a second rate of amplification faster than the first rate of amplification.Type: GrantFiled: December 9, 1994Date of Patent: June 11, 1996Assignee: International Business Machines CorporationInventor: Manoj Kumar
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Patent number: 5513351Abstract: A method of maintaining functional compatibility after performing system maintenance on a computer during system operation is described. The method starts when there is a request to perform system maintenance by determining if a directory holding a set of files to be maintenanced has adequate space for a set of new files. The system maintenance typically occurs when the operating system is to be replaced by a new operating system or upgraded with an improved version of the current operating system. Next, the system, in response to there being adequate space to for the new set of files, places the new set of files in the directory. Each file within the new set of files is given a new name within the directory. Each file in the set of old files in the directory is then renamed with a temporary name. The new names of the new set of files are then placed in an alias table for access by any other files open on the computer during maintenance.Type: GrantFiled: July 28, 1994Date of Patent: April 30, 1996Assignee: International Business Machines CorporationInventor: Jeffrey A. Grantz
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Patent number: 5463764Abstract: A system and method for providing debugging of a data processing system having a plurality of resources, a keyboard and a multitasking operating system including a plurality of protection domains and a keyboard device driver which executes in a protection domain having maximum access privileges to system resources. A debugging module in the keyboard device driver is provided. Responsive to user selection through a predetermined key stoke sequence, the debugging module may be invoked. Utilizing the debugging module, various system registers and memory locations are accessed and the contents placed in the keyboard input buffer for display on a computer monitor.Type: GrantFiled: October 6, 1994Date of Patent: October 31, 1995Assignee: International Business Machines CorporationInventor: Ted R. Mueller
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Patent number: 5428649Abstract: An elastic buffer utilizes a circular buffer for receiving successive symbols over a communications link. The transmission clock of the received symbols and internal clock of the node on which the elastic buffer is located are independent. The transmission clock is used to load the successive symbols received over the transmission link into the circular buffer. The internal clock controls reading of the successive symbols from the circular buffer. A phase comparator operating on the transmission and internal clocks periodically generates an input side skip signal when the transmission clock overtakes the phase of the internal clock and an output side skip signal when the internal clock overtakes the phase of the external clock. An idle symbol detector monitors the successive symbols generates an idle indication when an idle symbol occurs. Responsive to concurrence of an input side skip signal and an idle indication, loading of an idle symbol from successive symbols into the circular buffer is omitted.Type: GrantFiled: December 16, 1993Date of Patent: June 27, 1995Assignee: International Business Machines CorporationInventor: Delbert R. Cecchi
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Patent number: D363923Type: GrantFiled: March 22, 1994Date of Patent: November 7, 1995Assignee: International Business Machines CorporationInventor: Shima Hisashi