Abstract: A fusible link for a semiconductor device comprises an insulating substrate and a conductive line pair on the surface of the insulating substrate, with the conductive line pair having spaced ends. A polymer is disposed over the insulating substrate and between the conductive line pair ends. The polymer is capable of being changed from a non-conductive to a conductive state upon exposure to an energy beam. Preferably, the polymer comprises a polyimide, more preferably, a polymer/onium salt mixture, most preferably, a polyaniline polymer doped with a triphenylsufonium salt. The link may further comprise a low &kgr; nanopore/nanofoam dielectric material adjacent the conductive line ends.

Abstract: An improved TOL process with a partial lithography-assisted sacrifcial oxide strip to prevent arsenic out-diffusion from polysilicon studs during gate oxidation. The invention prevents arsenic out-diffusion during gate oxidation from polysilicon studs by completely covering polysilicon studs with an oxide layer during gate oxidation, therby mantaining nitrogen amounts in the thin gate oxide regions, and hence, maintaining gate oxide thickness and avoiding any increase in Vt's for thin gate devices.

Abstract: A process for manufacturing and a photomask including a chrome layer over a transparent substrate, followed by a thin hardmask/barrier layer directly over the chrome layer having a thin resist layer thereover. The thin resist layer is patterned and developed wherein the barrier layer acts to retard the formation of a resist “foot” at the bottom of the resist profile. Exposed portions of the hardmask/barrier layer and the underlying chrome layer are etched, and then any remaining hardmask/barrier layer and resist layer is subsequently removed by an etchant. The hardmask/barrier layer directly over the chrome layer enables an improved pattern transfer mask during chrome etching processes, allows for further reduction in the thickness of the resist layer, improves the image quality, the achievable minimum resolution features, and provides nominal image size control and image size uniformity across the photomask within current process flows and manufacturing.

Abstract: A method and apparatus are provided for forming a silicide on a semiconductor substrate by integrating under a constant vacuum the processes of removing an oxide from a surface of a semiconductor substrate and depositing a metal on the cleaned surface without exposing the cleaned surface to air. The method and apparatus of the present invention eliminates the exposure of the cleaned substrate to air between the oxide removal and metal deposition steps. This in-situ cleaning of the silicon substrate prior to cobalt deposition provides a cleaner silicon substrate surface, resulting in enhanced formation of cobalt silicide when the cobalt layer is annealed.

Abstract: The present invention comprises a chemical mechanical polishing tool comprising a polishing platen and a removable, replaceable platen top mounted on a top surface of the platen. Preferably, the platen top comprises a material substantially impervious to the slurries used when planarizing an object. Most preferably, the platen top comprises aluminum alloy or glass. The platen top may be tailored to provide enhanced polishing conditions by acting as an insulator, a conductor or machined to be concave or convex. The invention may further include endpoint sensors attached to the platen top.

Abstract: A method for preparing a semiconductor die for analysis comprises providing a semiconductor die having a connector on one side and an opposite, backside surface to be analyzed, providing a polishing pad for polishing the backside surface of a semiconductor die, providing a rotatable spindle for securing the polishing pad, and providing a constant force actuator on the spindle, the constant force actuator being adapted to provide constant force between the polishing pad and the backside surface of the die. The method then includes contacting the backside die surface with the polishing pad, rotating the spindle and polishing pad, and polishing the backside surface of the die while maintaining the substantially constant force of the polishing pad on the die backside surface with the constant force actuator.

Abstract: A method and apparatus for editing an integrated circuit by bombarding a feature in need of editing with either a low-energy or high-energy electron beam in the presence of a gas whereby low energy electrons activate reactants adsorbed on the surface of the feature in need of editing to form active species on the feature surface. The reaction products from the process can be easily removed whereby IC damage, leakage between metal features, wafer contamination and physical sputtering of undesired material can be significantly minimized while still possessing nanometer-scale spatial resolution. The low energy electrons for activating the reactants adsorbed on the surface of the feature to be edited may be emitted from the electron beam itself or they may be secondary low energy is electrons emitted from the surface of the feature being edited.

Abstract: A method and system for real-time, in-situ measurement of a film being deposited onto a surface of a wafer in a tool during semiconductor, optical component and electro-optic component processing and manufacturing. The method and system include real-time, in-situ detecting and analyzing radiation within the tool which is reflected off a wafer surface and subsequently diffusely reflected off internal roughened surfaces of the processing chamber. The emitted radiation may be derived from the plasma within the chamber, or alternatively, an external energy source. In detecting and analyzing the radiation reflected off the internal surfaces of the processing tool, the instant method and system monitors the deposition process of the film and automatically controls the deposition of such film in response to the measurements taken.

Abstract: A method and cluster tool for selectively removing contaminating particles from a substrate surface using a laser. An inspection tool scans the substrate surface to detect and identify any defects on the substrate surface, and then suitable software analyzes the scanned data to determine characteristics of the defect including the type of defect, the number of defects, sizes of each defect and the planar x, y coordinates of each defect. This data is used to command a laser tool to remove only those defects identified as contaminants that are capable of being removed from the surface of the substrate and may be detrimental to subsequent substrate processing techniques. The laser contacts this identified contaminant at its x, y coordinates to remove only such contaminant while not substantially treating or directly contacting the area surrounding the contaminant, thereby preventing damaging or altering the substrate surface.

Abstract: A sealing assembly is provided for sealing retractable opposing planar surfaces of processing modules each having sealable cavities for the fabrication of semiconductor wafers. The sealing assembly may include an inner frame adapted to be concentrically positioned within a central opening of an outer frame. The outer frame may include lifting tabs attached to an upper portion such that the lifting tabs are graspable to removably position the sealing assembly between the opposing planar surfaces of the processing modules. An O-ring, which may include an elastomeric material, is adapted to fit about a circumference of the inner frame. The opposing surfaces of the processing modules define an opening therebetween which accepts the sealing assembly. The opposing surfaces of the modules are retractably movable towards one another thereby coupling the O-ring between the opposing planar surfaces to provide a seal.

Abstract: Disclosed is a method and apparatus which gives a user of a client computer greater control over a web browser by providing a web browser start indicator. The web browser start indicator controls the redirection capabilities of a web browser so that the user is not directed to another web site without the user's permission when closing a web browsing session or when returning to a previously viewed web site. Preferably, the present invention is embodied as a computer program product, for example a web browser and a web browser language such as JavaScript®, stored on a program storage device. Greater privacy and control is provided to users over current and subsequent browsing sessions.

Abstract: A method and apparatus are provided for eliminating contaminants including metallic and/or hydrocarbon-containing contaminants on a surface of a semiconductor substrate by heating a semiconductor substrate which may have contaminants on the surface thereof to an elevated temperature within an integrated closed system while simultaneously purging the integrated closed system with a chlorine-containing gas. At the elevated temperatures the chlorine dissociates from the chlorine-containing gas and reacts with the contaminants on the substrate surface to form volatile chloride byproducts with such contaminants which are removed from the integrated closed system while the substrate is continuously heated and purged with the chlorine-containing gas. Subsequently, the substrate is moved to a cooling chamber within the integrated closed system and cooled to provide a semiconductor substrate having a clean surface.

Abstract: The present invention discloses the use of ion implant recipe changes to control the effective channel length by compensating for any variation in the gate electrode width. The invention provides a method for controlling the effective channel length in FETs by measuring the gate electrode width, sending the measured gate electrode width to an ion implant controller, calculating a desired ion implant condition which compensates for any deviation in the effective channel length from target, and subsequently selecting or generating an ion implant recipe based on the desired conditions. Such ion implant recipe is then implanted into the FET to control the effective channel length by defining the halo, LDD, source, drain, or any other doped regions of the device which define the effective channel length, thereby resulting in a manufacturing process with higher yields and less scrap.

Abstract: A semiconductor structure includes a diamond-like carbon layer as a polish-stop for patterning a metal level into an inter-level dielectric substrate in a damascene process flow. The semiconductor structure includes a substrate having a dielectric layer followed by the diamond-like carbon layer on a surface thereof. The diamond-like carbon layer is used as a hard-mask for forming conductive metal features from grown substrate material that fills a plurality of openings in the substrate, therein forming a semiconductor island structure, The semiconductor structure has a planar surface at the diamond-like carbon layer and the grown substrate material, whereby the diamond-like carbon polish-stop layer allows for over-planarization of the semiconductor island structure to provide an improved planar surface having a sufficient decrease in topography.

Abstract: A thin transition-metal based scattering layer of a mask blank for use in EPL systems is formed by providing the thin transition-metal scattering layer directly over membrane layers on a lot of substrates, thereby forming a continuous contact between the single transition metal-based scattering layer and the membrane layer. Preferably, the single transition metal-based scattering layer is a single tantalum-silicon composite scattering layer having a stoichiometry of TaxSi. The deposition parameters for depositing the thin transition-metal based scattering layer are adjusted to provide the scattering layer uniformly over all substrates within the lot. A first substrate from the lot of substrates is then selected, an initial stress measurement of the scattering layer is determined and then the substrate is annealed at a first temperature.

Abstract: The present invention discloses a method and apparatus for correctly positioning the text of a hypertext markup language (html) file on a display screen linked to a computer such that there are no partial lines of text displayed and without the re-display of text that was displayed on a previous screen. By correctly positioning the text on the display screen, even when the user scrolls the text backwards and forwards, only entire lines of text are displayed which makes reading the text on the screen much more user friendly. By locating the html tags within the html source file, the number of lines of text in the file are determined and subsequently assigned to a screen row within the display screen such that only entire lines of text are displayable.

Abstract: A self-aligned shallow trench isolation region for a memory cell array is formed by etching a plurality of vertical deep trenches in a substrate and coating the trenches with an oxidation barrier layer. The oxidation barrier layer is recessed in portions of the trenches to expose portions of the substrate in the trenches. The exposed portions of the substrate are merged by oxidization into thermal oxide regions to form the self-aligned shallow trench isolation structure which isolates adjacent portions of substrate material. The merged oxide regions are self-aligned as they automatically aligned to the edges of the deep trenches when merged together to define the location of the isolation region within the memory cell array during IC fabrication. The instant self-aligned shallow trench isolation structure avoids the need for an isolation mask to separate or isolate the plurality of trenches within adjacent active area rows on a single substrate.

Abstract: A method of etching an organic antireflective film layer underlying a patterned resist layer on a semiconductor substrate by contacting the exposed organic film with a fluorocarbon and nitrogen etchant in the presence of a plasma-generated energy and removing exposed areas of the organic film with the etchant. An oxide layer underlying the organic film layer is substantially undamaged after contact with the etchant. The plasma is a high density plasma and preferably contains argon, C4F8, and nitrogen.

Abstract: A method of depositing thin films comprising Ti and TiN within vias and trenches having high aspect ratio openings. The Ti and TiN layers are formed on an integrated circuit substrate using a Ti target in a non-nitrided mode in a hollow cathode magnetron apparatus in combination with controlling the deposition temperatures by integrating cooling steps into the Ti/TiN deposition processes to modulate the via and contact resistance. The Ti and TiN layers are deposited within a single deposition chamber, without the use of a collimator or a shutter.

Abstract: A method of forming openings on a semiconductor wafer comprising an initial step of providing a first film layer over the semiconductor wafer. A first opening in the first film layer is created by transferring an image of the first opening from a photoresist layer into the first film layer using an etching procedure. The first opening includes horizontal and vertical surfaces and has first width and height dimensions. After removing the photoresist layer, a second film layer is deposited over the first film layer and the opening such that the opening has a second width and height dimension which is less than the first width and height dimension. The second film layer is then anisotropically etched from the horizontal surface of the first film layer, and the horizontal surface of the opening such that the opening includes the first height dimension and the second width dimension.