Abstract: This invention relates to coin-operated telephones and apparatus for preventing the accidental or fraudulent simulation of coin deposit signals. At the beginning of each coin call or overtime period, a coding algorithm is randomly chosen at the coin station and the identity of the chosen algorithm is transmitted over the telephone line to a receiving telephone office. For each coin deposited, the coin station generates accumulated coin deposit information, codes it in accordance with the chosen algorithm and then transmits the coded accumulated deposit information to the telephone office. The office decodes the received information in accordance with the chosen algorithm identity information previously received at the telephone office to ascertain the amount deposited at the coin station.

Abstract: A high-capacity low-blocking time-division switching system including a space-division switching network is disclosed for switching serial digital data words synchronously received on time multiplexed lines in a first code format wherein each data word occupies substantially an entire time multiplexed channel time period. In order to achieve high capacity and low blocking, the space-division switching network is physically large resulting in delays of the digital data words transmitted therethrough, which delays are significant when compared with the time duration of a time-division multiplex channel and which vary in accordance with the path selected. The communication paths through the stages of the space-division network are reconfigured each time-division multiplex channel time duration, but due to the transmission delays, the effective transmission period is less than the time duration of a channel.

Abstract: An arrangement for establishing communication paths through a plurality of serially connected thyristors comprising a first and last thyristor, is disclosed. Each thyristor comprises a main conduction path terminating in a first and second main conduction electrode and a control path between the first electrode and a gate electrode. The second main conduction electrode of each thyristor, except the last, is connected to the first main conduction electrode of a subsequent thyristor. To establish a path, a marking potential is applied to the first main conduction electrode of the first thyristor and gate currents, equal to or greater than the thyristor holding currents, are produced in the control paths of the thyristors in sequence and overlapped in time from the first to the last. A hold current is then produced in the second main conduction electrode of the last thyristor and the gate currents are terminated.

Abstract: A high capacity time-division switching system is disclosed which includes a digital data transmission system for transmitting both digital data words and synchronizing information. The predetermined bit positions of each data word, which bit positions are to convey data only, are encoded and transmitted as a combination of the true and complement representation of those digits. The remaining bit positions, which are used to convey both data and synchronizing information, are encoded and transmitted as true representations only. A digital data receiver responds to the data so encoded by extracting synchronizing information based on the violation of the predominately true and complement coding format.

Abstract: A high-capacity, low-blocking time-division switching system including a three-stage space-division network is disclosed. In order to achieve high capacity and low blocking the space-division network is physically large resulting in delays of the Pulse Code Modulated (PCM) data words transmitted therethrough which are large in comparison to the individual time slots. In order to effectively increase the time available for the transmission of data words through the space-division network, communication paths through the individual network stages are completed in sequence and overlapped in time. The result of this operation is that a path through each network stage is completed for a time less than or equal to a time slot but the time between establishing the first stage path and removing the last stage path is sufficient to pass an entire data word.