Patents Represented by Attorney, Agent or Law Firm Kent B. Chambers
  • Patent number: 6836766
    Abstract: The invention provides the ability to test rules in a rule-based system for configuring a product. The configuration system defines the components of a product using elements contained in a parts catalog and rules that define relationships between the components of a product. The user provides test cases that select at least one part to include in the product configuration, and the configuration tester processes the rule to determine whether the at least one part selected in the test case conflicts with the plurality of parts previously included in the product configuration.
    Type: Grant
    Filed: January 31, 2001
    Date of Patent: December 28, 2004
    Assignee: Trilogy Development Group, Inc.
    Inventors: Kevin E. Gilpin, Adam R. Stein
  • Patent number: 6834287
    Abstract: A classification engine provides flexible support for manipulation of attribute-based data by dynamic generation of SQL with classifiers constructed from different schema objects representing different database schemas. The classifiers may be constructed by defining classifiers corresponding to the database schema, and mapping the classifiers to columns on tables in the database. The invention also allows a classification system to modify the database structure and easily conform the classification engine to the modified structure without recompiling the engine or rewriting the application that use the classification system. The engine is conformed to the new structure by constructing a second schema object for the modified database. The schema objects are preferably defined using a field-based language such as extensible markup language (XML).
    Type: Grant
    Filed: March 14, 2001
    Date of Patent: December 21, 2004
    Assignee: Trilogy Development Group, Inc.
    Inventors: Ben Folk-Williams, Jimmy Wan
  • Patent number: 6834282
    Abstract: A logical and constraint-based hierarchical approach provides a highly flexible and expressive way in which to browse items stored in a database. The logical and constraint-based approach permits a user to create an arbitrary number of hierarchical representations of the items in a database. The approach permits items to be logically grouped on one level and grouped based on attribute/value constraints on the next. The hierarchical representation consists of nodes that are related to one another in a tree-like structure starting with a root node. Each node has a unique label, preferably indicative of the items in the database that it represents. Each node has a list of the labels of the nodes that are its children. Each node can only be the child of one parent node. Nodes may optionally express constraints based on attributes and their values that serve to define the scope of database items that fall under the node in the hierarchy.
    Type: Grant
    Filed: June 18, 2001
    Date of Patent: December 21, 2004
    Assignee: Trilogy Development Group, Inc.
    Inventors: Scott Bonneau, Michael Nonemacher, Jeremy Weinrib
  • Patent number: 6822594
    Abstract: A combination of low order and high order filters and a rule-based 1-bit quantizer with multiple feedback paths and separate quantization output provide stabilization to a delta-sigma modulator during quantizer overload conditions. The 1-bit delta-sigma modulator system combines the superior in-band noise shaping properties of a high order delta-sigma modulator with the stability of a low order delta-sigma modulator to obtain a high order delta-sigma modulator with overload stability. The 1-bit quantizer operates in accordance with a set of primary quantization rules that enables high and low order delta-sigma modulators to work together and remain stable during overload conditions while minimizing performance degradation.
    Type: Grant
    Filed: October 9, 2003
    Date of Patent: November 23, 2004
    Assignee: Cirrus Logic, Inc.
    Inventors: John L. Melanson, Kent B. Chambers
  • Patent number: 6762704
    Abstract: A digital input signal is modulated using multiple digital signal modulators operating at a variety of clock frequencies and clock frequency phase relationships to drive a load, such as an opposed current amplifier or other opposed current converter. The combinations of frequency relationships and digital signal modulator elements provide significant digital signal processing capabilities and flexible output signal timing. In one embodiment, a digital input signal, which may be biased, is modulated by multiple digital signal modulators to generate corresponding output signals. The corresponding output signals are utilized to drive a load, such as a half bridge, opposed current amplifier and to produce a single output signal. By adjusting the phase relationships between the clock frequencies, various output signal characteristics are achieved. Additionally, by utilizing digital signal processing to modulate the input signal, various processing technologies are applied to the input signal.
    Type: Grant
    Filed: December 9, 2002
    Date of Patent: July 13, 2004
    Assignee: Cirrus Logic, Inc.
    Inventors: John L. Melanson, Jack B. Andersen
  • Patent number: 6693571
    Abstract: A digital signal modulator modulates a digital input signal to drive a load, such as an opposed current amplifier or other opposed current converter. The combinations of frequency relationships and digital signal modulator elements provide significant digital signal processing capabilities and flexible output signal timing. In one embodiment, a digital signal modulator modulates a digital input signal. Even and odd samples of the input signal propagate along two respective channels (signal paths), which include further digital processing capabilities, such as pulse width modulation, to generate output signals appropriate for the topology of a load. Additionally, a bias signal may be modulated with the digital input signal. By utilizing digital signal processing to modulate the input signal, various processing technologies are applied to the input signal. For example, noise shaping may be implemented using a delta-sigma modulator as an input stage to the two channels.
    Type: Grant
    Filed: December 20, 2002
    Date of Patent: February 17, 2004
    Assignee: Cirrus Logic, Inc.
    Inventors: John L. Melanson, Jack B. Andersen, Michael G. Chorn
  • Patent number: 6219417
    Abstract: A line card integrates subscriber line interface circuitry, A/D and D/A converters, and digital signal processing technology. The digital signal processing technology performs many line card tasks such as switch hook detection, ground key detection, DC feed control, polarity reversal, ringing tests, fault detection, power cross detection, and ring trip detection. A line card having a digital signal processor supports both integral and external ringing signal generators. During application of a ringing signal, the line card detects ring trip conditions while discriminating against short duration short circuits. The line card includes programmable features that facilitate adaptation to varying regional ring trip detection and short duration short circuit discrimination specifications and subscriber loop characteristics.
    Type: Grant
    Filed: June 6, 1997
    Date of Patent: April 17, 2001
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Yan Zhou
  • Patent number: 6178241
    Abstract: A line card integrates subscriber line interface circuitry, A/D and D/A converters, and digital signal processing technology. The digital signal processing technology performs many line card tasks such as switch hook detection, ground key detection, DC feed control, polarity reversal, ringing tests, fault detection, power cross detection, and ring trip detection. Actual subscriber loop parametric conditions may be determined by a digital signal processor using sensed small signals on both the A and B conductors of subscriber loop. By sensing small signals, saturation of sensing circuitry may be avoided. Furthermore, relatively high speed digital signal processing facilitates accurate and expeditious switch hook status determination.
    Type: Grant
    Filed: June 6, 1997
    Date of Patent: January 23, 2001
    Assignee: Legerity, Inc.
    Inventor: Yan Zhou