Abstract: This disclosure describes rate control techniques that can improve video encoding. The described rate control techniques exploit relationships between the number of bits encoded per frame and the number of non-zero coefficients of the video blocks after quantization. The number of number of non-zero coefficients of the video blocks after quantization is referred to as rho (?). The value of ? is generally proportional to the number of bits used in the video encoding. This disclosure utilizes a relationship between ? and a quantization parameter (QP) in order to achieve rate controlled video encoding. More specifically, this disclosure exploits a parametric equation to map a value of a predicted ? to a QP.

Abstract: In accordance with a method for distributed beamforming based on carrier to caused interference, a base station may receive channel state information from users. The base station may select a codeword from a codebook. The codeword may be selected so as to maximize a utility function that is based on a signal-to-caused-interference-plus-noise ratio. The base station may use the codeword for beamforming.

Abstract: Methods, apparatuses, and systems are presented for transmitting data packets in a wireless network over a multi-access channel involving sequentially sending a plurality of medium access control (MAC) data packets from a transmitter over the multi-access channel, using a physical layer protocol based on a standard physical layer protocol having a short interframe spacing (SIFS), wherein the plurality of MAC data packets includes at least a first data packet and a second data packet separated by a reduced interframe spacing that is less than SIFS, attempting to receive the plurality of MAC data packets at a receiver using the physical layer protocol, including the first data packet and the second data packet separated by the reduced interframe spacing, and sending from the receiver a single acknowledgement packet associated with attempting to receive the plurality of MAC data packets.

Abstract: A wireless device detects for an adverse channel condition, which may be (1) a frequent out of service (FOOS) condition indicative of frequent in and out of service or (2) an unbalanced forward/reverse link condition indicative of unbalanced coverage for the forward and reverse links. A FOOS condition may be detected based on an average in-service time, the number of lost system connections, the number of systems to which connections have been made, the rate of change for the systems, the altitude of the wireless device, and/or other parameters. An unbalanced forward/reverse link condition may be detected based on the average in-service time, the number of system access failures, and/or other parameters. The wireless device performs at least one action to conserve battery power if an adverse channel condition is detected. The action(s) may include performing system acquisition less frequently, disabling system registration, performing registration less frequently, and/or going to sleep.

Abstract: This disclosure describes equalization techniques for spread spectrum wireless communication. The techniques may involve estimating a channel impulse response, estimating channel variance, and selecting filter coefficients for an equalizer based on the estimated channel impulse response and the estimated channel variance. Moreover, in accordance with this disclosure, the channel variance estimation involves estimation of two or more co-variances for different received samples. Importantly, the equalizer is “fractionally spaced,” which means that the equalizer defines fractional filtering coefficients (filter taps), unlike conventional equalizers that presume that filter coefficients are defined at integer chip spacing. The techniques can allow the equalizer to account for antenna diversity, such as receive diversity, transmit diversity, or possibly both.

Abstract: In general, the disclosure is directed to techniques for combining a high performance receiver and a low power receiver within a wireless communication device (WCD) to reduce power consumption. Upon receiving a signal from a base station, a controller within the WCD detects one or more channel conditions of a radio frequency (RF) environment between the base station and the WCD. The controller selects a high performance receiver to process the received signal when the RF environment is unfavorable and selects a low power receiver to process the received signal when the RF environment is favorable. In this manner, the WCD implements an adaptive receiver that adapts its receiver structure according to RF channel conditions.

Abstract: According to the invention an embodiment, a network node for communicating using a MAC address is disclosed. The network node includes a point-to-point interface, a bridge and a MAC address register. The point-to-point interface uses a first protocol. The bridge is coupled to the point-to-point interface and provides a fixed route for the Ethernet interface. The first protocol encapsulates the data of a second protocol. The MAC address register stores the MAC address for the second protocol, were the MAC address is dynamically determined in the field and written to the MAC address register. The MAC address is used when communicating with the network node through the point-to-point interface.

Abstract: To access a first communication system, a terminal determines a transmission time for an access probe, an expected response time from the system, and a protected time interval based on the transmission time and/or expected response time. The terminal determines a starting time for sending the access probe such that the protected time interval does not overlap a tune-away interval in which the terminal is to monitor anther frequency/air-interface. This starting time may be set initially to the end of a prior access probe plus a pseudo-random wait duration and may be advanced forward or moved backward in time, if needed, by a time duration selected such that the protected time interval does not overlap the tune-away interval.

Abstract: In one embodiment, this disclosure provides an encoding device comprising a mode selection engine that performs mode selection for intra-prediction encoding regardless of whether the encoding device is programmed to comply with first encoding standard or a second encoding standard. The device also includes a first encoder to perform the intra-prediction encoding according to the selected mode in compliance with the first encoding standard when the encoding device is programmed to comply with the first encoding standard, and a second encoder to perform the intra-prediction encoding according to the selected mode in compliance with the second encoding standard when the encoding device is programmed to comply with the second encoding standard. The techniques can simplify mode selection in support of multiple different intra-prediction encoding standards.

Abstract: To detect the presence of at least one other terminal in a data session (e.g., an RTP session), terminal a generates a request to solicit a response from each terminal, forms an APP packet in RTCP for the request, encapsulates the APP packet in at least one IP packet, and sends the IP packet(s) to the other terminal(s). Terminal a then monitors for a response from each terminal to which the request is sent. Terminal a declares a terminal to be present in the data session if a response is received from that terminal. Terminal a may send one or more additional requests to each terminal from which a response is not received. Terminal a declares a terminal to be absent from the data session if a predetermined number of (e.g., two) requests have been sent to that terminal and a response is not received from the terminal.

Abstract: This disclosure describes a clock circuit for a memory controller. The described circuit uses a processor clock signal to generate an input clock signal for use during write operations to the memory, or to generate a feedback clock signal for use during read operations from the memory. The circuit is particularly applicable to mobile wireless devices that include memories that do not generate a strobe. The clock circuit may comprise a driver in series with a resistor element that generates an input clock signal for input to a memory, and a resistor-capacitor (RC) filter in series with a receiver that generates a feedback clock signal for output from the memory, wherein an input to the RC filter is tapped between the driver and the resistor element.

Abstract: Techniques for adaptively scaling voltage for a processing core are described. In one scheme, the logic speed and the wire speed for the processing core are characterized, e.g., using a ring oscillator having multiple signal paths composed of different circuit components. A target clock frequency for the processing core is determined, e.g., based on computational requirements for the core. A replicated critical path is formed based on the characterized logic speed and wire speed and the target clock frequency. This replicated critical path emulates the actual critical path in the processing core and may include different types of circuit components such as logic cells with different threshold voltages, dynamic cells, bit line cells, wires, drivers with different threshold voltages and/or fan-outs, and so on. The supply voltage for the processing core and the replicated critical path is adjusted such that both achieve the desired performance.

Abstract: A PLL includes a charge pump, a loop filter, a VCO, and a calibration unit. The calibration unit performs coarse tuning to select one or multiple frequency ranges, performs fine tuning to determine an initial control voltage that puts the VCO near a desired operating frequency, measures the VCO gain at different control voltages, and derives VCO gain compensation values for the different control voltages. The calibration unit also pre-charges the loop filter to the initial control voltage to shorten acquisition time, enables the loop filter to drive the VCO to lock to the desired operating frequency, and performs VCO gain compensation during normal operation. For VCO gain compensation, the calibration unit measures the control voltage, obtains the VCO gain compensation value for the measured control voltage, and adjusts the gain of at least one circuit block (e.g., the charge pump) to account for variation in the VCO gain.