Abstract: A multi-threaded processor is provided. The multi-threading processor includes a first instruction fetch unit and a second instruction fetch unit. A multi-thread scheduler unit is coupled to the first instruction fetch unit and the second instruction fetch unit. An execution unit, which executes a first active thread and a second active thread is coupled to the scheduler unit. The multi-threading processor also includes a register file coupled to the execution unit. The register file switches one of the first active thread and the second active threads with a first inactive thread.

Abstract: A MEMS die is bonded to a cap to form a MEMS device. The cap is non-silicon and has an electrical via extending from one side of the cap to another side of the cap. In one embodiment, a plurality of caps is wafer bonded to a plurality of MEMS dice.