Abstract: A three-dimensional phase-change memory array. In one embodiment of the invention, the memory array includes a first plurality of diodes, a second plurality of diodes disposed above the first plurality of diodes, a first plurality phase-change memory elements disposed above the first and second plurality of diodes and a second plurality of memory elements disposed above the first plurality of memory elements.

Abstract: A programmable resistance memory element. The active volume of memory material is made small by the presence of a small area of contact between the conductive material and the memory material. The area of contact is created by forming a region of conductive material and an intersecting sidewall layer of the memory material. The region of conductive material is preferably a sidewall layer of conductive material.

Abstract: The invention provides a memory cell based on variable resistance material memory element that includes an access device having a pillar structure that may also include a protective sidewall layer. The pillar access device selects and isolates the memory cell from other memory array cells and is adapted to both self-align any memory element formed thereon, and to deliver suitable programming current to the memory element. The pillar structure is formed from one or more access device layers stacked above a wordline and below the memory element. Optional resistive layers may be selectively formed within the pillar structure to minimize resistance in the access device layer and the memory element. The pillar access device may be a diode, transistor, Ovonic threshold switch or other device capable of regulating current flow to an overlying programmable memory material.

Abstract: A photovoltaic device including a current collection element and a method of making same. The photovoltaic device includes a substrate, a conductive layer, an active photovoltaic material, a transparent electrode and a current collection element. The current collection element includes a transparent support and one or more conductive wires integrated therewith. The conductive wires are in electrical communication with the transparent electrode. Current generated by the active photovoltaic material passes to the transparent electrode. The current collection element facilitates delivery of current passing through the transparent electrode to leads that deliver the current to an external load. The method includes placing a pre-fabricated current collection element in direct contact with the transparent electrode of the photovoltaic device. The time and expense of assembling the conductive wires during fabrication of the photovoltaic device is thereby avoided and higher manufacturing speeds are achieved.

Abstract: A multi-layer thin-film device includes thin film memory and thin film logic. The thin film memory may be programmable resistance memory, such as phase change memory, for example. The thin film logic may be complementary logic.

Abstract: Apparatus and method for plasma deposition of thin film photovoltaic materials at microwave frequencies. The apparatus avoids deposition on windows or other microwave transmission elements that couple microwave energy to deposition species. The apparatus includes a microwave applicator with conduits passing therethrough that carry deposition species. The applicator transfers microwave energy to the deposition species to transform them to a reactive state conducive to formation of a thin film material. The conduits physically isolate deposition species that would react to form a thin film material at the point of microwave power transfer. The deposition species are separately energized and swept away from the point of power transfer to prevent thin film deposition. The invention allows for the ultrafast formation of silicon-containing amorphous semiconductors that exhibit high mobility, low porosity, little or no Staebler-Wronski degradation, and low defect concentration.

Abstract: A method and apparatus for forming thin film materials via a plasma deposition process in the presence of a magnetic field. A precursor is delivered to a deposition chamber and activated to form a plasma. The plasma may be initiated in the presence of a magnetic field or subjected to a magnetic field after initiation. The plasma includes ionized and neutral species derived from the precursor and the magnetic field manipulates the plasma to effect a reduction in the population of ionized species and an enhancement of the population of neutral species. A thin film material is subsequently formed from the resulting neutral-enriched deposition medium. The method permits formation of thin film materials having a low density of defects. In one embodiment, the thin film material is a photovoltaic material and the suppression of defects leads to an enhancement in photovoltaic efficiency.

Abstract: A memory includes a programmable resistance array with high ratio of dynamic range to drift coefficient phase change memory devices.

Abstract: A method of programming a multi-layer chalcogenide electronic device. The device includes an active region in electrical communication with two terminals, where the active region includes two or more layers. The method includes providing an electrical signal between the two terminals, where the electrical signal alters an electrical characteristic of a layer remote from one of the terminals. In one embodiment, the layer remote from the terminal is a chalcogenide material and the electrical characteristic is resistance. In another embodiment, an electrical characteristic of the layer in contact with the terminal is also altered. The alteration of an electrical characteristic may be caused by a transformation of a chalcogenide material from one structural state to another structural state.

Abstract: A programmable resistance, chalcogenide, switching or phase-change material device includes a substrate with a plurality of stacked layers including a conducting bottom electrode layer, an insulative layer having an opening formed therein, an active material layer deposited over both the insulative layer, within the opening, and over selected portions of the bottom electrode, and a top electrode layer deposited over the active material layer. The device uses temperature and pressure control methods to increase surface mobility in an active material layer, thus providing complete coverage or fill of the openings in the insulative layer, selected exposed portions of the bottom electrode layer, and the insulative layer.

Abstract: An array of non-volatile memory cells arranged in logical columns and logical rows, and associated circuitry to enable reading or writing one or more memory cells on a row in parallel. In some embodiments, the array of memory cells may include a phase change material. In some embodiments, the circuitry may include a write driver, a read driver, a sense amplifier, and circuitry to isolate the memory cells from the sense amplifier with extended refresh.

Abstract: Thin film logic circuits employ thin-film switching devices to execute complementary logic functions. Such logic devices operate, as complementary metal oxide semiconductor (CMOS) logic devices do, in a manner that does not provide a direct conduction path between a system supply and a system return. Complementary logic circuits may employ three-terminal threshold switches as switching elements.

Abstract: A method of programming a phase-change material. The method includes providing a transformation pulse to the phase-change material, where the transformation pulse includes a programming waveform and a conditioning waveform. The programming waveform provides sufficient energy to alter the structural state of the phase-change material. In one embodiment, the programming waveform alters the volume fractions of crystalline and amorphous phase regions within the phase-change material. The conditioning waveform provides sufficient energy to heat the phase-change material to a temperature above the ambient temperature but below the crystallization temperature of the phase-change material. The method programs the phase-change material to a state that exhibits a reduced time variation of resistance.

Abstract: An electronic system includes at least one reduced-complexity integrated circuit memory coupled to a memory controller. By reducing the complexity of each integrated circuit memory and concentrating the complexity within the memory controller, overall system costs may be greatly reduced and reliability improved.

Abstract: Chalcogenide devices are delineated and sidewalls of the devices are sealed, in an anaerobic and/or anhydrous environment environment. Throughout the delineation and sealing steps, and any intervening steps, the sidewalls are not exposed to oxygen or water. In an illustrative embodiment, a cluster tool includes an etching tool and a sealing/deposition tool configured to etch and seal the chalcogenide devices and to maintain the devices in an anaerobic and/or anhydrous environment throughout the process.

Abstract: Logic circuits are disclosed that include one or more three-terminal chalcogenide devices. The three-terminal chalcogenide devices are electrically interconnected and configured to perform one or more logic operations, including AND, OR, NOT, NAND, NOR, XOR, and XNOR. Embodiments include series and parallel configurations of three-terminal chalcogenide devices. The chalcogenide devices include a chalcogenide switching material as the working medium along with three electrical terminals in electrical communication therewith. In one embodiment, the circuits include one or more input terminals, one or more output terminals, and a clock terminal. The input terminals receive one or more input signals and deliver them to the circuit for processing according to a logic operation. Upon conclusion of processing, the output of the circuit is provided to the output terminal. The clock terminal delivers a clock signal to facilitate operation of the three-terminal devices included in the instant circuits.

Abstract: A phase change memory includes a volume of phase change material disposed between, and coupled to, two electrodes, with the composition of a region of at least one of the two electrodes or phase change material having been compositionally altered to reduce the programmed volume of the phase change material.

Abstract: A programmable resistance memory employs a feedback control circuit to regulate the programming current supplied to a selected programmable resistance memory element. The programmable resistance memory may be a phase change memory. The feedback control circuit monitors and controls the characteristics of a current pulse employed to program a memory cell.

Abstract: A memory includes an interface through which it provides access to memory cells, such as phase change memory cells. Such access permits circuitry located on a separate integrated circuit to provide access signals, including read and write signals suitable for binary or multi-level accesses.

Abstract: A programmable resistance memory combines multiple cells into a block that includes one or more shared electrodes. The shared electrode configuration provides additional thermal isolation for the active region of each memory cell, thereby reducing the current required to program each memory cell.