Abstract: Techniques for arranging operations performable on information in an information processing system are provided. In a system having a plurality of information producers and a plurality of information subscribers, paths are identified over which information traverses, and within which the information is subject to select and/or transform operations. The present invention optimizes the system by reorganizing the sequence of select and transform operations so that transforms follow select operations; and by combining multiple select and transform operations into single select and transform operations, respectively. Using these optimizations, the processing resources of the system can be reorganized, and/or information flow graphs describing the system can be designed, so that the select operations are “pushed” toward the producers, and transform operations are “pushed” toward the subscribers. Efficient content-based routing systems can then be used to implement the select operations.

Abstract: A technique for optimizing published event message sequences destined for information subscribers in an information processing system. Subscribers specify event interpretation rules which map event message streams into states. The event interpretation rules are maintained elsewhere in the system in preparation for providing optimized, possibly shorter, event message streams to subscribers, sufficient to correctly update the states. If a subscriber temporarily loses access to its event message stream, the optimized event message stream is determined using a shortest path graph search technique between the states defined by the start and end of the missing portion of the stream. Optimizations to the shortest path graph search technique are disclosed for use when the event interpretation rule is in replacement form, in which estimator functions based on extended rules are employed.

Abstract: A method and structure to form a conductive pattern on a ceramic sheet deposits a photosensitive conductive material on a carrier and exposes a pattern of x-ray energy on the material and sinters the carrier and the material to the ceramic sheet so that only the conductive pattern of the material remains on the ceramic sheet. The structure has a conductive patterned material which includes a photosensitive agent.

Abstract: Resources are checkpointed in order to save the state of the resources. The resources can then be brought back to the same running state, during a restart procedure, by making use of the saved state. The determination of when to take a checkpoint or when to restart a resource is made by an entity, such as a cluster manager, external to the entity initiating or taking the checkpoint or performing the restart. The decision to checkpoint/restart a resource is provided by the cluster manager to a resource manager associated with the resource. This communication is facilitated by interfaces to the cluster manager provided by the resource manager.

Abstract: A double-gate field effect transistor (DGFET) is provided using a damascene-like replacement gate processing step to create sidewall source/drain regions, oxide spacers and gate structures inside a previously formed trench. The damascene-like replacement gate processing step allows for the fabrication of a tapered transistor body region having a thicker body under the contacts which reduces access resistance.

Abstract: A method and apparatus for adaptive resonance cancellation in a rotating storage system, includes designing a set of digitally selectable optimum resonance cancellation filters, generating a series of excitation signals for injection into the filters, generating a characteristic resonance frequency based on the excitation signals, and computing an address pointer corresponding to the resonance frequency, to select an optimum resonance cancellation filter.

Abstract: The present invention enables image information of high resolution to be transferred via a transmission line with limited band width using a simple configuration. In transferring image information between a main body of a computer and a display, a dither matrix is used to update images stored in the display. That is, a plurality of blocks whose size is of a predetermined dither matrix are defined in an image, and information of each pixel in each block is transferred to the display in order of a value of a corresponding element in the dither matrix. Transfer of unchanged pixel data can be omitted. In addition, in transferring image information between the main body of the computer and the display, image information stored in the computer is divided into a plurality of blocks, for each of which the number of changed pixels or the number of writings to pixels in the block is calculated so that image information in blocks which exceed a predetermined number is transferred to the display block by block.

Abstract: Apparatus and method for generating a view element representation of multiple-attribute tabular data are provided, including converting tabular data into a multidimensional lattice form whereby each functional attribute of the relational data is mapped to a dimension in the lattice, and each cell in the lattice corresponds to an aggregation over records in the data table. The mechanism further provides for generating a view element representation of multidimensional lattice data comprising decomposing the multidimensional data into view elements such that the view elements retain sufficient information to reconstruct the original lattice data. Alternatively, the mechanism for generating a view element data representation including iterative decomposition of the lattice data into aggregated and residual view elements or by spatially partitioning the lattice data.

Abstract: A mixed rotative and weighted arbiter for arbitrating the priority of request signals R1-Rn supplied from a plurality of devices is disclosed. The arbiter is composed of a token circuit which delivers a token vector having one position set active. The token vector as well as the plurality of request signals are input to a rotative arbitration circuit. The rotative arbitration circuit processes a round robin algorithm to output a rotative request vector having input requests ordered from a higher to a lower priority configuration according to the active position of the token vector. The arbiter further comprises a weighted arbitration circuit connected to the output of the rotative arbitration circuit for generating a weighted request vector determining a linear priority configuration of the rotative request vector.

Abstract: A method of forming a semiconductor substrate (and resultant structure), includes providing a semiconductor substrate to be silicided including a source and drain formed therein on respective sides of a gate, depositing a metal film over the gate, source and drain regions, reacting the metal film with Si at a first predetermined temperature, to form a metal-silicon alloy, etching the unreacted metal, depositing a silicon film over the source drain and gate regions, annealing the substrate at a second predetermined temperature, to form a metal-Si2 alloy, and selectively etching the unreacted Si.

Abstract: An infrared (IR) transceiver having a receiver chain with an isolated analog output, includes a transmission gate and a unity gain buffer interposed between the amplifier output and an analog output pad. The transmission gate behaves as a switch, passing the analog output signal to the analog output pad only when an analog output is required. The unity gain buffer has a high input resistance, a low input capacitance, a unity gain and a low output impedance, so that the load of a digital signal processing (DSP) device or measuring instrument on the analog output pad is isolated and does not affect the performance of the receiver chain. Since the transfer rates of the transmission gate and the buffer are each unity, the analog output pad provides a high fidelity analog output signal to the output buffer.

Abstract: A TCP-connection-router performs encapsulated clustering by dividing each encapsulated cluster into several Virtual EC (VECs), dynamically distributing incoming connections within a VEC based on current server load metrics according to a configurable policy. In one embodiment, the connection router supports dynamic configuration of the cluster, and enables transparent recovery which provides uninterrupted service to the VEC clients.

Abstract: Similarity measure has been one of the critical issues for successful content-based retrieval. Simple quadratic forms of distance is inadequate as it does not necessary correspond to perceived similarity nor is it adaptive to different applications. This patent application describes a new sequential query processing algorith for evaluating content-based composite object queries. The composite objects consist of spatial and temporal arrangements of simple objects. The simple objects are defined in terms of spatial, temporal, feature and semantic attributes. The query method defines a process for executing a best-first search for the matches to the query, while providing a flexible framework for broadening the search space as required. The query method guarantees that there are no false dismissals of the candidate composite objects.

Abstract: An affinity-based router and method for routing and load balancing in an encapsulated cluster of server nodes is disclosed. The system consists of a multi-node server, wherein any of the server nodes can handle a client request, but wherein clients have affinity to one or more of the server nodes that are preferred to handle a client request. Such affinity is due to state at the servers either due to previous routing requests, or data affinity at the server. At the multi-node server, a node may be designated as a TCP router. The address of the TCP router is given out to clients, and client requests are sent thereto. The TCP router selects one of the nodes in the multi-node server to process the client request, and routes the request to this server; in addition, the TCP router maintains affinity tables, containing affinity records, indicating which node a client was routed to.

Abstract: To suitably distribute the load between a client node and a server node in a client-server system, the client node sends a task request signal to the server node in response to input from a user. The server node, upon receiving the task request signal, acquires a CPU load ratio from the operating system and performs the requested task when the CPU load ratio is lower than a preset value to send the result of the task to the client node. Conversely, when the CPU load ratio is higher than the preset value, the server node sends a response signal to the effect that the client node is to execute the requested task. When the client node requests transmission of an application program in response to the response signal from the server, the server node sends an application program for use in performing the requested task to the client node. The client node executes the application program and obtains the result of the task.

Abstract: A three-phase database crash recovery mechanism is detailed including a forward phase, a backward phase, and a third, so-called “sideward” phase for recovery of transactions which were interrupted at the time of the crash, using Global Transaction IDs to track the status of the transactions at the coordinating and at the participating nodes. Depending upon the status of the transaction at the time of the crash, either a query message to the coordinating node or a vote message to the participating nodes is generated and processed, thereby allowing most interrupted transactions to be completed.

Abstract: The rate staggering technique for efficient storage and retrieval of video data is embodied in a data processing system including a disk array based video server, which includes a disk array for storing video data, a processor for processing data, a memory buffer for storing video data and a rate staggering controller. Data is transferred to a network from video server through a network interface and from the network to client stations employing devices having differing resolution capabilities. The processor executes tasks under control of the rate staggering controller. These tasks include a retrieval task which retrieves scalable video from the array of disks, a storage task which stores videos temporarily in the memory buffer, and a transmission task which transmits video to client stations through the network.

Abstract: A search request is syntactically analyzed, and location constraint data for keywords and function words (FNWORD) are extracted that constitute partial-order relationships. A document, which is to be retrieved and for which no syntactic analysis is required, is searched for that contains a sentence that matches the partial-order relationship. In the search for the document containing the sentence that matches the partial-order relationship, a sentence having a short context that matches the partial-order relationship is regarded as a sentence that has a higher similarity.

Abstract: An X-Y grid tree clock distribution network for distributing a clock signal across a VLSI chip. Tunable wiring tree networks are combined with an X-Y grid vertically and horizontally connecting all the tree end points. No drivers are necessary at connection points of the tree end points to the X-Y grid. The final X-Y grid distributes the clock signal close to every place it is needed, and reduces skew across local regions. A tuning method allows buffering of the clock signal, while minimizing both nominal clock skew and clock uncertainty. The tuned tree networks provide low skew even with variations in clock load density and non-ideal buffer placement, while minimizing the number of buffers needed. The tuning method first represents a total capacitance of one or more of clock pin loads and twig wiring as a clustered grid load. Next, a smoothing of the clustered grid loads approximates the effect of the X-Y grid.

Abstract: An interlocked pipelined CMOS (IPCMOS) family of logic circuits provides extremely high performance pipelined operation and guarantees error free operation where variations in timing are compensated for automatically by the circuits. The IPCMOS logic circuits also provide a standard interface that makes it possible to interface different macro types easily. The IPCMOS logic circuits feature interlocking in both the forward and reverse directions. This “handshaking” guarantees error free timing and makes it possible to eliminate the need for a global clock at the macro level. Timing signals are generated locally at the macro level from the handshaking signals between macros. This makes it possible for the local circuits to deal with global timing variations caused by power supply noise, ACLV, and parameter variations. The macros operate in a pipelined mode with data advancing automatically from macro to macro with the timing controlled by the local handshaking signals.