Patents Represented by Attorney, Agent or Law Firm Knobbe, Matens, Olson & Bear, LLP
  • Patent number: 7862396
    Abstract: Disclosed is a method of making a flat panel display device. The device has a first substrate, a second substrate opposing the first substrate and an array of pixels formed therebetween. A frit is interposed and interconnects between the first substrate and second substrate. The frit is melted by irradiating a first laser and a second laser. The first and second lasers move along the different paths.
    Type: Grant
    Filed: December 11, 2006
    Date of Patent: January 4, 2011
    Assignee: Samsung Mobile Display Co., Ltd.
    Inventor: Jong Woo Lee
  • Patent number: 7711651
    Abstract: Media and apparatus for managing usage of utilities are disclosed. Generally, each involves receiving representation of utility service usage at a load, receiving and storing in a storage device a usage range representation comprising at least one expected value of utility input to the load and/or at least one expected value of output from the load, and producing a control signal for use by a utility service controller when usage is outside of usage range representation. Control signal is operable to cause the utility service controller to regulate or interrupt the supply of the utility service to the load.
    Type: Grant
    Filed: December 23, 2004
    Date of Patent: May 4, 2010
    Assignee: Smart Disaster Response Technologies, Inc.
    Inventor: Mohammad Reza Baraty
  • Patent number: 6243282
    Abstract: A memory module is described which can be programmed with module information, identifying the type and size of the memory module, after complet assembly of the memory module. The memory module includes a plurality of edge connectors for electrically connecting the memory module circuitry external to the memory module, and a plurality of DRAM memory devices electrically connected to corresponding edge connectors for receiving and providing data from and to the external circuitry. The memory module also includes a Serial EEPROM for storing the module information. The Serial EEPROM has a Serial Data pin connected to a first of the edge connectors for providing the module information to the external circuitry. The Serial EEPROM has a Write Control pin for receiving an enabling signal which selectively enables the operation of the Serial EEPROM in Write or Read-Only mode. The memory module further includes interface circuitry which couples the Write Control pin with a second and a third of the edge connectors.
    Type: Grant
    Filed: September 11, 2000
    Date of Patent: June 5, 2001
    Assignee: Micron Technology Inc.
    Inventors: Thomas C. Rondeau, II, Allan R. Magee
  • Patent number: 6209539
    Abstract: A patient adapter for being connected to gas tubing in a ventilator circuit comprises of an inspiratory and an expiratory pipe, the latter having an internal diameter at least about 20% greater than the diameter of the inspiratory pipe. The invention also includes a respirator circuit in which an expiratory limb has an internal diameter at least about 20% greater than the diameter than the inspiratory tubing limb.
    Type: Grant
    Filed: March 22, 1999
    Date of Patent: April 3, 2001
    Assignee: Hudson Respiratory Care Inc.
    Inventors: Thomas C. Loescher, Dennis Fitzwater
  • Patent number: 6082122
    Abstract: There is provided a calibration method of a detecting section which is provided on a substrate incorporated into a system interconnection generator and which detects by detecting means an object to be detected or an value of the object to be detected. The calibration method comprises the steps of prior to the substrate being incorporated into the system interconnection generator, measuring by the detecting section a reference value of the object to be detected by the detecting section; storing at least one of an error with respect to the reference value measured by the measuring step and the measured value of the reference value in association with the measurement result; and after the substrate being incorporated into the system interconnection generator, outputting the measurement result of the detecting section based on at least one of the error and the measured reference value, stored by the storing step in association with the measurement result.
    Type: Grant
    Filed: October 15, 1998
    Date of Patent: July 4, 2000
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Masaki Madenokouji, Keigo Onizuka, Isao Morita, Hisashi Tokizaki
  • Patent number: 6083140
    Abstract: An internal combustion engine having an engine camshaft driven air compressor. The air compressor supplies air under pressure through separate regulated and controlled circuits to air springs for urging the poppet valves of the engine to a closed position and engine driven accessories, such as a variable throttle mechanism and/or an air actuator for controlling for a change speed transmission.
    Type: Grant
    Filed: November 15, 1995
    Date of Patent: July 4, 2000
    Assignee: Yamaha Hatsudoki Kabushiki Kaisha
    Inventor: Takaaki Kimura
  • Patent number: 5972686
    Abstract: The present invention relates to a novel ice nucleation active Xanthomonas strain and a bacterial ice nucleator comprising the ice nucleation active microorganism which can be applied for food processing and artificial snow making. The present inventors have screened ice nucleation active microorganisms from leaves of crops and plants, and investigated their ice-nucleation activities. As a result, the inventors discovered that a novel microorganism belonging to Xanthomonas campestris has a superior ice-nucleation activity than those of the conventional ice nucleation active microorganisms. Accordingly, the ice nucleation active microorganism of the invention can be used as a potent bacterial ice nucleator for food processing and artificial snow making.
    Type: Grant
    Filed: May 19, 1998
    Date of Patent: October 26, 1999
    Assignee: Samyang Genex Co., Ltd.
    Inventors: Choong-Kyung Kang, Gwang-Hwee Na, Hyun-Geun Yoon, Seung-Suh Hong, Hyun-Soo Lee
  • Patent number: 5836575
    Abstract: A wafer stand for facilitating the inspection, testing, and handling of large-diameter silicon wafers, such as those having a diameter of 8 inches (200 mm), during semiconductor processing and assembly. The stand consists of a lower plate or pedestal, a plurality of adjustable legs mounted thereon, and an upper plate mounted on the upper end of the legs. The top plate has an access aperture of a diameter coinciding approximately with that of the wafer, and can be adjusted such that the attitude and/or height of the upper plate in relation to the pedestal can be varied. In one embodiment, the front leg of the stand may be removed to provide better access to the bottom of the wafer. The upper plate is also provided with a pair of parallel tracks into which a wafer mounting frame can be slid to position the wafer over the access aperture. The wafer stand is constructed so as to permit its temporary mounting to a workbench or table, yet is fully transportable by one person.
    Type: Grant
    Filed: October 30, 1996
    Date of Patent: November 17, 1998
    Assignee: Micron Electronics, Inc.
    Inventors: Keith Robinson, Robert Villa
  • Patent number: 5808133
    Abstract: The invention provides an alicyclic bifunctional compound represented by the formula ##STR1## wherein R is a carboxyl group, a lower alkoxycarbonyl group or a hydroxymethyl group and n is 0 or 1.
    Type: Grant
    Filed: February 7, 1997
    Date of Patent: September 15, 1998
    Assignee: Arakawa Chemical Industries Ltd.
    Inventors: Takaharu Tsuno, Hideki Kobayashi
  • Patent number: 5682390
    Abstract: A semiconductor test system is to realize a pattern generation that makes possible to test memory devices having arbitrary cycle latency operations when using multiple pattern generators. A cycle shift circuit that outputs a delayed expected value signal by shifting the expected value by one cycle with the operating period of the pattern generator is arranged. A N to 1 selector that selects an arbitrary signal from the expected value signal output by the multiple pattern generators including itself and the delayed expected value signal output by the multiple pattern generators excluding itself is arranged. A cycle shift section is arranged for the output selected by the selector. An arbitrary cycle shift can be generated by the expected value pattern using the above multiple pattern generators.
    Type: Grant
    Filed: August 23, 1995
    Date of Patent: October 28, 1997
    Assignee: Advantest Corporation
    Inventors: Takahiro Housako, Jun Hashimoto
  • Patent number: 5640102
    Abstract: The present invention provides a cost effective and compact pin test circuit for non-connection pins of the semiconductor device under test. The pin test circuit includes a plurality of exclusive DC channels each of which has a flirt relay controlled by a control signal for switching ON/OFF a power source which generates a predetermined voltage, and a second relay controlled by a control signal switching ON/OFF a fixed electric potential such as a ground level electric potential. The exclusive DC channel is used for the NC pin testing and connected to each of the NC pins which are divided into two groups. The exclusive DC channels are used to determine whether or not the NC pins form an electrical short circuit each other by connecting one NC pin to a ground level and while connecting the other NC pin to the power source having the DC measurement function.
    Type: Grant
    Filed: December 22, 1995
    Date of Patent: June 17, 1997
    Assignee: Advantest Corporation
    Inventor: Kazuhiko Sato
  • Patent number: 5629649
    Abstract: A frequency standard generator includes a voltage controlled crystal oscillator for generating high stability output signal to be used as a standard frequency signal, a satellite wave receiver which receives a radio wave from a satellite which includes a highly accurate satellite time signal and reproduces the satellite time signal to be used as a reference for the voltage controlled crystal oscillator, a frequency divider which divides the output signal of the voltage controlled crystal oscillator by a dividing ratio arranged to generate a crystal time signal which is identical in frequency to the satellite time signal, a time interval measuring circuit which measures a time interval which is a phase difference between the satellite time signal and the crystal time signal and generates a digital signal indicating the phase difference, a frequency control processor which arithmetically determines control data based on the digital signal from the time interval measuring circuit such that the phase difference m
    Type: Grant
    Filed: November 22, 1995
    Date of Patent: May 13, 1997
    Assignee: Advantest Corporation
    Inventor: Hitoshi Ujiie