Patents Represented by Attorney Koppel, Patrick, Heybl & Dawson
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Patent number: 7936039Abstract: A pixel for a CMOS photo sensor with increased full well capacity is disclosed. The pixel having a photosensitive element, a photo gate, potential well and a readout circuit. The photosensitive element having a front side and a back side, for releasing charge when light strikes the back side of the photosensitive element. The potential well receives the released charge from the photosensitive element. The photo gate located on the front side of the photosensitive element, for transferring the released charge from the potential well to a sense node. The readout circuit coupled to the sense node, for measuring a voltage corresponding to the released charge transferred to the sense node.Type: GrantFiled: October 20, 2008Date of Patent: May 3, 2011Assignee: Teledyne Scientific & Imaging, LLCInventor: Stefan Clemens Lauxtermann
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Patent number: 7935150Abstract: A replacement device for resurfacing a joint surface of a femur and a method of making and installing such a device is provided. The custom replacement device is designed to substantially fit the trochlear groove surface, of an individual femur. Thereby creating a “customized” replacement device for that individual femur and maintaining the original kinematics of the joint. The replacement device may be defined by four boundary points, and a first and a second surface. The first of four points is 3 to 5 mm from the point of attachment of the anterior cruciate ligament to the femur. The second point is near the bottom edge of the end of the natural articulatar cartilage. The third point is at the top ridge of the right condyle and the fourth point at the top ridge of the left condyle of the femur.Type: GrantFiled: May 14, 2008Date of Patent: May 3, 2011Assignee: Kinamed, Inc.Inventors: Roger Carignan, Clyde R. Pratt
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Patent number: 7936528Abstract: A graded order-sorting filter for hyperspectral imagers and methods of making the same are provided. The graded order-sorting filter includes a substrate wafer having a first side and a second side and is formed of a material that is substantially transparent to light photons. The graded order-sorting filter also includes an absorption filter deposited outwardly from the first side of the substrate wafer. The absorption filter is tapered along a taper direction and formed of a graded composition semiconductor material with a bandgap graded to decrease outwardly from the substrate wafer and/or graded along the taper direction. The graded composition semiconductor material is substantially transparent to the light photons for photon energies substantially less than the bandgap. The above filter can also be aligned to a two-dimensional array of pixels to form a hyperspectral imager.Type: GrantFiled: December 31, 2008Date of Patent: May 3, 2011Assignee: Teledyne Scientific & Imaging, LLCInventor: William E Tennant
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Patent number: 7934517Abstract: Systems for controlling the level of water with in reservoir, such as in a catch basin for an infinity pool. One embodiment of such a water level control system comprises a system housing having a removable front plate with front plate openings, and a water inlet into the housing. The system further comprises a removable mounting plate within the housing, with the mounting plate removable from the housing when the front plate is removed. A valve is included that is connected to the mounting plate, with water from the reservoir entering the housing through the front plate openings. The valve is operable to allow water to flow into the housing through the water inlet when water within the reservoir water falls below a desired level, and stopping the flow into the housing when the reservoir is at the desired level.Type: GrantFiled: December 28, 2007Date of Patent: May 3, 2011Assignee: MP Industries, Inc.Inventor: Dan Morrison
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Patent number: 7937429Abstract: An equalization scheme for a transmission line employs a Taylor series expansion which enables the provided equalization to be adjusted based on line length. Multiple circuit blocks compute respective terms of the Taylor series, which are then summed to provide a compensating frequency response. For example, for a conductor having a frequency response given by H(f)=e?kl(1+j)?{square root over (f)}, where k is a constant dependent on the physical parameters of the conductor, l is the length of the conductor and f is the frequency of the signal propagated via the conductor, the present scheme provides an inverse frequency response H?1 (f) given by H?1 (f)= 1 + kl ? f 1 ! + k 2 ? l 2 ? f 2 ! + k 3 ? l 3 ? f 2 3 ! + … . The kl terms serve as weighting factors which vary with the length of the conductor.Type: GrantFiled: August 28, 2007Date of Patent: May 3, 2011Assignee: Analog Devices, Inc.Inventor: Yu-Lun Richard Lu
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Patent number: 7932111Abstract: A method for fabricating light emitting diode (LEDs) comprises providing a plurality of LEDs on a substrate wafer, each of which has an n-type and p-type layer of Group-III nitride material formed on a SiC substrate with the n-type layer sandwiched between the substrate and p-type layer. A conductive carrier is provided having a lateral surface to hold the LEDs. The LEDs are flip-chip mounted on the lateral surface of the conductive carrier. The SiC substrate is removed from the LEDs such that the n-type layer is the top-most layer. A respective contact is deposited on the n-type layer of each of the LEDs and the carrier is separated into portions such that each of the LEDs is separated from the others, with each of the LEDs mounted to a respective portion of said carrier.Type: GrantFiled: February 23, 2005Date of Patent: April 26, 2011Assignee: Cree, Inc.Inventor: John Edmond
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Patent number: 7932106Abstract: The surface morphology of an LED light emitting surface is changed by applying a reactive ion etch (RIE) process to the light emitting surface. High aspect ratio, submicron roughness is formed on the light emitting surface by transferring a thin film metal hard-mask having submicron patterns to the surface prior to applying a reactive ion etch process. The submicron patterns in the metal hard-mask can be formed using a low cost, commercially available nano-patterned template which is transferred to the surface with the mask. After subsequently binding the mask to the surface, the template is removed and the RIE process is applied for time duration sufficient to change the morphology of the surface. The modified surface contains non-symmetric, submicron structures having high aspect ratio which increase the efficiency of the device.Type: GrantFiled: August 2, 2006Date of Patent: April 26, 2011Assignee: Cree, Inc.Inventor: Ting Li
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Patent number: 7928475Abstract: A transistor structure comprising an active semiconductor layer with metal source and drain contacts formed in electrical contact with the active layer. A gate contact is formed between the source and drain contacts for modulating electric fields within the active layer. A spacer layer is formed above the active layer and a conductive field plate formed above the spacer layer, extending a distance Lf from the edge of the gate contact toward the drain contact. The field plate is electrically connected to the gate contact and provides a reduction in the peak operational electric field.Type: GrantFiled: May 29, 2007Date of Patent: April 19, 2011Assignee: Cree, Inc.Inventors: Primit Parikh, Yifeng Wu
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Patent number: 7920324Abstract: A system and method for telescope guiding requires creating an artificial reference star which is locked to the line of sight of the imaging means of a main telescope in the field-of-view (FOV) of a guide scope. A real guide star is selected using the guide scope, such that both artificial and guide stars are within the FOV of the guide scope. Guiding is accomplished by varying the line of sight such that the positional displacement between the guide and artificial stars on the guide star's focal plane is maintained approximately constant. The artificial star is created by generating a point source of light near the main scope's imaging means, directing the light outside the main scope and retroreflecting it at the same direction angle of the beam exiting the aperture into the guide scope, effectively locking the guide scope to the line of sight of the imaging means.Type: GrantFiled: April 19, 2007Date of Patent: April 5, 2011Assignee: Aplegen, Inc.Inventor: Alan W. Holmes
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Patent number: 7915629Abstract: A high efficiency light emitting diode with a composite high reflectivity layer integral to said LED to improve emission efficiency. One embodiment of a light emitting diode (LED) chip comprises an LED and a composite high reflectivity layer integral to the LED to reflect light emitted from the active region. The composite layer comprises a first layer, and alternating plurality of second and third layers on the first layer, and a reflective layer on the topmost of said plurality of second and third layers. The second and third layers have a different index of refraction, and the first layer is at least three times thicker than the thickest of the second and third layers. For composite layers internal to the LED chip, conductive vias can be included through the composite layer to allow an electrical signal to pass through the composite layer to the LED.Type: GrantFiled: December 8, 2008Date of Patent: March 29, 2011Assignee: Cree, Inc.Inventors: Ting Li, Monica Hansen, James Ibbetson
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Patent number: 7915644Abstract: A HEMT comprising an active region comprising a plurality of active semiconductor layers formed on a substrate. Source electrode, drain electrode, and gate are formed in electrical contact with the active region. A spacer layer is formed on at least a portion of a surface of said active region and covering the gate. A field plate is formed on the spacer layer and electrically connected to the source electrode, wherein the field plate reduces the peak operating electric field in the HEMT.Type: GrantFiled: May 7, 2009Date of Patent: March 29, 2011Assignee: Cree, Inc.Inventors: Yifeng Wu, Primit Parikh, Umesh Mishra, Marcia Moore
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Patent number: 7916539Abstract: Memory embodiments are provided to operate in memory systems which are configured to have a system ground and a system substrate that are biased at different voltages. At least one of these embodiments includes a memory cell and write and read circuits in which the memory cell is coupled to the system substrate and the write and read circuits are coupled to the system ground. The memory cell preferably has a cross-coupled pair of transistors which can be set in first and second states. The write circuit is arranged and level shifted to drive the cross-coupled pair into either selected one of the states and the read circuit is arranged and level shifted to provide a data signal indicative of the selected state.Type: GrantFiled: January 23, 2009Date of Patent: March 29, 2011Assignee: Analog Devices, Inc.Inventor: Jeffrey G. Barrow
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Patent number: 7915085Abstract: A method and apparatus for coating a plurality of semiconductor devices that is particularly adapted to coating LEDs with a coating material containing conversion particles. One method according to the invention comprises providing a mold with a formation cavity. A plurality of semiconductor devices are mounted within the mold formation cavity and a curable coating material is injected or otherwise introduced into the mold to fill the mold formation cavity and at least partially cover the semiconductor devices. The coating material is cured so that the semiconductor devices are at least partially embedded in the cured coating material. The cured coating material with the embedded semiconductor devices is removed from the formation cavity. The semiconductor devices are separated so that each is at least partially covered by a layer of the cured coating material.Type: GrantFiled: September 18, 2003Date of Patent: March 29, 2011Assignee: Cree, Inc.Inventors: Michael S. Leung, Eric J. Tarsa, James Ibbetson
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Patent number: 7910938Abstract: A light emitting packaged diode ids disclosed that includes a light emitting diode mounted in a reflective package in which the surfaces adjacent the diode are near-Lambertian reflectors. An encapsulant in the package is bordered by the Lambertian reflectors and a phosphor in the encapsulant converts frequencies emitted by the LED chip and, together with the frequencies emitted by the LED chip, produces white light. A substantially flat meniscus formed by the encapsulant defines the emitting surface of the packaged diode.Type: GrantFiled: August 16, 2007Date of Patent: March 22, 2011Assignee: Cree, Inc.Inventors: Christopher P. Hussell, Michael J. Bergmann, Brian T. Collins, David T. Emerson
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Patent number: 7905705Abstract: A fluid flow-driven energy conversion system configured to oscillate in the presence of fluid flow. The system comprises an adjustable electromechanically controlled fluidfoil, a balance beam, a compensatory weight and an angle of attack positioner to adjust the angle of attack of the fluidfoil with respect to fluid flow. The fluidfoil is controlled to permit a consistently optimum angle of attack into the prevailing flow. The kinetic energy of the oscillating action is transferred to a connector for energy transfer to one of a variety of energy storage systems for converting the energy of the linear oscillating motion to other desired forms of energy.Type: GrantFiled: October 2, 2009Date of Patent: March 15, 2011Assignee: W2 Energy Development CorporationInventor: Gene Ryland Kelley
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Patent number: 7906404Abstract: A semiconductor device and method for fabricating the same is provided. The semiconductor device includes a substrate, at least one capacitor, an active circuit and a power plane. The substrate has a first cavity formed through a first surface to a first depth and a second cavity formed through a second surface to a second depth. The first and second cavities forming a via hole through the substrate. The at least one capacitor includes a first conductive material layer deposited in the via hole, a first isolation material layer deposited over the first conductive material layer, and a second conductive material layer deposited over the first isolation material layer. The active circuit adjacent the first surface and electrically coupled to the at least one capacitor, and the power plane adjacent the second surface and electrically coupled to the at least one capacitor to provide power conditioning to the active circuit.Type: GrantFiled: November 21, 2008Date of Patent: March 15, 2011Assignee: Teledyne Scientific & Imaging, LLCInventors: Jeffrey DeNatale, Atul Joshi, Per-Olov Pettersson
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Patent number: 7897419Abstract: A method for fabricating a plurality of LED chips comprises providing a plurality of LEDs and forming a plurality of spacers each of which is on at least one of the LEDs. Coating the LEDs with a conversion material, each of the spacers reducing the amount of conversion material over its one of the LEDs. This reduction causes the plurality of LED chips to emit a wavelength of light in response to an electrical signal that is within a standard deviation of a target wavelength. LEDs, LED chips and LED chip wafers are fabricated using the method according to the present invention. One embodiment of an LED chip wafer according to the present invention comprises a plurality of LEDs on a wafer and a plurality of a spacers, each of which is on a respective one of the LEDs. A conversion material at least partially covers the LEDs and spacers, with at least some light from the LEDs passing through the conversion material and is converted.Type: GrantFiled: December 23, 2008Date of Patent: March 1, 2011Assignee: Cree, Inc.Inventor: Matthew Donofrio
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Patent number: D634863Type: GrantFiled: January 10, 2008Date of Patent: March 22, 2011Assignee: Cree Hong Kong LimitedInventor: Chi-Wing Leung
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Patent number: D635889Type: GrantFiled: August 17, 2009Date of Patent: April 12, 2011Assignee: The Vase Collar Company, LLCInventor: James D. Lowder, III
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Patent number: D637516Type: GrantFiled: August 17, 2009Date of Patent: May 10, 2011Assignee: The Vase Collar Company, LLCInventor: James D. Lowder, III