Abstract: Aspects of the present invention are related, in general, to Type-III phase-locked loops. In particular, aspects of the present invention relate to analog Type-III phase-locked loop arrangements comprising at least two signal paths, wherein each signal path may correspond to a bandwidth partition and may be selected by a selector according to a bandwidth parameter value. According to one aspect of the present invention, a first signal path may correspond to a fast loop (wide closed-loop bandwidth), and a second signal path may correspond to a slow loop (narrow closed-loop bandwidth).
Type:
Grant
Filed:
April 3, 2008
Date of Patent:
January 5, 2010
Assignee:
Tektronix, Inc.
Inventors:
Daniel G. Baker, Gilbert A. Hoffman, Michael S. Overton, Barry A. McKibben