Patents Represented by Attorney, Agent or Law Firm Kyle J. Way
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Patent number: 7194726Abstract: A method for automatically decomposing a dynamic system model into separate submodels for ultimate execution on diverse target platforms is provided. Embodiments of the invention provide a way for a system designer to indicate which portions of a previously-specified system model are to become submodels. Optionally, the designer may also indicate the associated target platform for the execution of each submodel. A system submodel for each portion designated by the designer is generated, keeping all critical system-level information consistent throughout the entire system model. Each of these system submodels may then be employed to generate a software version of each system submodel. Each software submodel may then be transferred to its specified target platform and executed in cooperation with the other software submodels to effect an overall system simulation executing across the associated target platforms.Type: GrantFiled: October 16, 2002Date of Patent: March 20, 2007Assignee: Agilent Technologies, Inc.Inventors: Richard Craig Allen, Randy A Coverstone
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Patent number: 7127272Abstract: A design system designs a first antenna system in a communication system. The design system retrieves demographic information of customers from a first database system. The design system determines communication traffic based on the demographic information. The design system retrieves parameters of a second antenna system from a second database system. The design system determines an antenna system configuration for the first antenna system based on the communication traffic and the parameters of the second antenna system. The design system then determines a performance of the first antenna system in response to determining the antenna system configuration for the first antenna system.Type: GrantFiled: February 27, 2002Date of Patent: October 24, 2006Assignee: Sprint Communications Company, L.P.Inventors: Lawrence J Almaleh, Douglas L Machamer, Nichole D Rowland, Todd A Rowley
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Patent number: 6833693Abstract: A switching control circuit for a switching power converter utilizes an oscillating signal that causes reduced electromagnetic interference by the power converter by way of modulating the frequency of the oscillating signal within a specified frequency range. An output voltage monitor circuit monitors the output voltage of the power converter, thus producing an output voltage monitor signal. Also, a randomized signal generator creates a randomized signal, which is then used to drive a frequency range converter that is employed to produce a frequency modulation signal. The current state of the frequency modulation signal is based on the current state of the randomized signal, with the frequency range converter limiting the current state of the frequency modulation signal so that the oscillating signal will only operate within the specified frequency range. A variable frequency oscillator then generates the oscillating signal whose frequency is based on the current state of the frequency modulation signal.Type: GrantFiled: April 30, 2003Date of Patent: December 21, 2004Assignee: Agilent Technologies, Inc.Inventor: Michael Andrews
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EMI reduction of voltage inverters by way of controlled randomized modulation of oscillating signals
Patent number: 6784625Abstract: A switching control circuit for a voltage inverter generates an oscillating signal that causes reduced electromagnetic interference by the voltage inverter by way of modulating the frequency of the oscillating signal within a specified frequency range. A randomized signal generator creates a randomized signal, which is then used to drive a frequency range converter that is employed to produce a frequency modulation signal. The current state of the frequency modulation signal is based on the current state of the randomized signal, with the frequency range converter limiting the current state of the frequency modulation signal so that the oscillating signal will only operate within the specified frequency range. A variable frequency oscillator then generates the oscillating signal whose frequency is based on the current state of the frequency modulation signal.Type: GrantFiled: April 30, 2003Date of Patent: August 31, 2004Assignee: Agilent Technologies, Inc.Inventor: Michael Andrews -
Patent number: 6783371Abstract: An electrical connection structure terminates an electrical signal wire while electrically coupling the wire to a target circuit board. A rigid printed circuit board or flex circuit is attached in a substantially perpendicular orientation to the target board by way of solder. A termination circuit is then mounted near the end of the rigid board or flex circuit that is attached to the target circuit board, with the termination circuit electrically coupling the signal wire with the target circuit board.Type: GrantFiled: April 17, 2001Date of Patent: August 31, 2004Assignee: Agilent Technologies, Inc.Inventors: Bobby J Self, Clarence Keith Griggs
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Patent number: 6774700Abstract: An electrical circuit generates both a differential data signal and a “squelch,” or “out-of-band,” state over a differential signal pair by employing common-mode logic (CML) technology. In one embodiment of the invention, a CML buffer having true and complementary (inverted) data outputs drive the differential data signal onto the positive (‘p’) and negative (‘n’) signal lines of the differential pair. To implement the squelch state, the true and complementary outputs of a two-input CML multiplexer are coupled with the corresponding outputs of the buffer. The data inputs of the multiplexer are driven by the data input signal driving the buffer, as well as the logical inversion of the data input signal. A squelch state signal then drives an input selector of the multiplexer to impress the squelch state over the differential signal pair when active.Type: GrantFiled: August 29, 2003Date of Patent: August 10, 2004Assignee: Agilent Technologies, Inc.Inventor: Glenn Wood
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Patent number: 6741953Abstract: A data acquisition circuit and method according to embodiments of the invention insert overflow states into a data storage unit among samples of input data and associated time tags that are of interest. The overflow states allow multiple overflows of the time tags without intervening samples of input data being stored, thus allowing the infrequent capture of samples of the input data while maintaining accurate timing data. Also, the overflow states obviate the need to store an overflow status flag with each stored sample of input data and time tag in the data storage unit.Type: GrantFiled: April 10, 2002Date of Patent: May 25, 2004Assignee: Agilent Technologies, Inc.Inventors: Adrian M. Hernandez, John David Hansen, John J. Sinnott
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Patent number: 6707877Abstract: A mechanism for adjusting an object in terms of its position along a vertical axis, and its rotational orientation about either two orthogonal horizontal axes or about a vertical and a horizontal axis, utilizes a set of electric motors in conjunction with a mechanical guiding structure that substantially restricts the movement of the object to the desired translational and rotational directions.Type: GrantFiled: September 27, 2001Date of Patent: March 16, 2004Assignee: Agilent Technologies, Inc.Inventor: David D Bohn
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Patent number: 6646346Abstract: An integrated circuit metallization structure using a titanium/aluminum alloy, and a method to generate such a structure, provide reduced leakage current by allowing mobile impurities such as water, oxygen, and hydrogen to passivate structural defects in the silicon layer of the IC. The titanium layer of the structure is at least partially alloyed with the aluminum layer, thereby restricting the ability of the titanium to getter the mobile impurities within the various layers of the IC. Despite the alloying of the titanium and aluminum, the metallization structure exhibits the superior contact resistance and electromigration properties associated with titanium.Type: GrantFiled: October 27, 2000Date of Patent: November 11, 2003Assignee: Agilent Technologies, Inc.Inventors: Ricky D. Snyder, Robert G Long, David W Hula, Mark D. Crook
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Patent number: 6628746Abstract: A image-based system for inspecting objects utilizes an imaging chain that defines a focal plane, a manipulator for translating and rotating either the object under inspection or the imaging chain, a surface mapping system that generates a representation of the surface of the object under inspection, and a controller that uses the representation of the surface of the object to control the manipulator so that a portion of the object under inspection lies within the focal plane of the imaging chain.Type: GrantFiled: October 30, 2001Date of Patent: September 30, 2003Assignee: Agilent Technologies, Inc.Inventors: Barry Eppler, Ronald K Kerschner, Martin C. Shipley
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Patent number: 6614260Abstract: Programmable circuit blocks and programmable interconnection blocks are utilized to effectively modify the functionality of a section of the IC. The use of a fixed ion beam machine or similar device is unnecessary, allowing functional modifications of the IC by way of electrically programming the device. As a result, the IC designer is not limited in the number of ICs that may be modified, which facilitates faster testing of IC design changes. Also, an IC may be modified multiple times by simply reprogramming the device.Type: GrantFiled: July 28, 2000Date of Patent: September 2, 2003Assignee: Agilent Technologies, Inc.Inventors: M. Jason Welch, Paul D Nuber
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Patent number: 6592680Abstract: An integrated circuit assembly cleaning apparatus and method allow a cleaning solution to completely fill spaces within an integrated circuit assembly. Such spaces include, for example, the thin space between the die and substrate of a flip-chip integrated circuit. The cleaning solution fills the space while the air initially occupying the space escapes. These actions are accomplished by first tilting the integrated circuit assembly from horizontal. The integrated circuit assembly is then immersed in the bath at a controllable rate to allow the cleaning solution to completely fill the space while the air in the space escapes.Type: GrantFiled: March 22, 2001Date of Patent: July 15, 2003Assignee: Agilent Technologies, Inc.Inventors: Pamela L Christison, Lawrence E. Houdek, John Pratt, Russell Bjorlie, William H Hanna, Perry H. Pierce
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Patent number: 6580660Abstract: A circuit and method according to an embodiment of the invention synchronize multiple digital data paths, each containing a set of digital data signals and an associated clock signal. The circuit includes a dual-port memory having a first port configured to store samples of each set of digital data signals by way of the clock signal associated with each set. A second port of the memory is configured to retrieve the stored samples, with the retrieval of the samples being timed so that each of the sets of digital data signals is synchronized with each other and with one of the clock signals.Type: GrantFiled: January 30, 2002Date of Patent: June 17, 2003Assignee: Agilent Technologies, Inc.Inventor: Adrian M. Hernandez
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Patent number: 6512387Abstract: A system and method of testing the quality of electronic device interconnections uses a pressure-sensitive medium. The interconnections of the electronic device are placed in contact with the pressure-sensitive medium. Force is then applied to the device so that an indication of the pressure exerted by each interconnection is produced by the pressure-sensitive medium. The indication of the pressure exerted by each interconnection is then analyzed to determine the quality of the connections of the electronic device.Type: GrantFiled: July 31, 2001Date of Patent: January 28, 2003Assignee: Agilent Technologies, Inc.Inventor: David D Bohn
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Patent number: 6508660Abstract: A shroud for a rectangular PCB-mounted electronic connector fashioned from a single piece of metal surrounds the connector on three sides of the connector by way of three walls. The fourth side of the connector is also partially covered via flanges extending from the end walls of the shroud. The walls and flanges of the shroud extend higher than the connector, thus defining a channel that aligns a mating structure for the connector when the mating structure is being plugged into the connector.Type: GrantFiled: January 31, 2001Date of Patent: January 21, 2003Assignee: Agilent Technologies, Inc.Inventor: Bobby J Self
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Patent number: 6452410Abstract: An electrolyte is employed to test for defects in bare printed circuit boards. A bare board under test is placed in a conductive tank and immersed in an electrolyte. A probe is then used to contact a pad of a net to be tested on the board. The electrical resistance is then measured across the net and the electrolyte, the magnitude of the resistance being related to the number of pads actually connected to the net. The measurement thus provides an indication of whether the correct number of pads have been detected. Defects on the board, such as unintended short circuits and open circuits, cause the number of pads detected to be different from the expected value, thereby affecting the measured resistance.Type: GrantFiled: January 5, 2000Date of Patent: September 17, 2002Assignee: Agilent Technologies, Inc.Inventor: Kenneth P Parker
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Patent number: 6430078Abstract: A circuit and method of implementing a digital read-only memory (ROM) utilizes a means for selectively driving one of two complementary logic state signal lines to a voltage reference upon a readout signal for an addressable bit becoming active. Each complementary logic state signal line represents one of two logic states. The logic state of the addressed bit is determined by which of the two complementary logic state signal lines is driven. The logic level of each complementary logic state signal line is then inverted and driven onto the other so that both signal lines will be driven to their proper logic state, thereby allowing either signal line to be used in ascertaining the logic state of the bit being addressed.Type: GrantFiled: July 3, 2001Date of Patent: August 6, 2002Assignee: Agilent Technologies, Inc.Inventors: Victoria Meier, Robert J. Martin
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Patent number: 6429683Abstract: An apparatus and method of shifting a low-voltage-swing digital signal to a signal of the same polarity with a relatively higher voltage swing are described which eliminate static current consumption by way of a feedback circuit and a pull-up device. By the use of embodiments according to the invention, little power is consumed, and hot electron injection as a mechanism for FET degradation is of little concern. Additionally, no specialized reference voltage is necessary, and precise layout of the circuit is not critical to proper circuit performance.Type: GrantFiled: August 16, 2000Date of Patent: August 6, 2002Assignee: Agilent Technologies, Inc.Inventors: Darrin C. Miller, Brian C Miller
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Patent number: 6409520Abstract: An electrical connection structure and method allow the coupling of one printed circuit board with another without the use of cables or connectors. An edge of one printed circuit board contains a plurality of plated split holes. Within each hole, an electrically conductive leg is maintained by way of solder, thus providing electrical connectivity between the first and second printed circuit boards. Additionally, a method of soldering a wire coil into a series of such edge-positioned plated split holes and subsequently cutting the coil along the edge of the first printed circuit board will yield the desired conductive legs.Type: GrantFiled: July 31, 2001Date of Patent: June 25, 2002Assignee: Agilent Technologies, Inc.Inventor: Bobby J. Self
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Patent number: 6370678Abstract: A system and method of adjusting the logic synthesis process of the design of an integrated circuit takes into account the interaction between the IC core logic circuitry, the on-chip power supply circuitry, and the package power supply circuitry. In IC package/circuit technology combinations that have been employed in previous IC designs, the associated package and on-chip power supply circuit designs are stable and well-defined, thus allowing the generating of simulation models for those power supply circuits. Those models are used to identify resonant frequencies and other characteristics of the power supply circuitry. By using the identity of the power supply resonant frequencies and the power supply models themselves, design constraints are developed that are supplied as input, either directly or indirectly, to the logic synthesis process to avoid incompatibilities of a periodic and non-periodic nature between the IC core logic and the power supply circuitry.Type: GrantFiled: April 27, 2000Date of Patent: April 9, 2002Assignee: Agilent Technologies, Inc.Inventor: Jason H Culler