Patents Represented by Attorney, Agent or Law Firm L. Anne Kinsman
  • Patent number: 6836893
    Abstract: A data driven communication system has three layers consisting of destination, people or network nodes, and devices. Software agents represent the entities of these layers and relationships between agents are defined by policies or chains of policies. These relationships are used to determine communication paths within the system as well as features associated with a particular communication. A database representation of the objects (agents and policies) is used to configure the system and receive updates to the system by an administrator. A graphical user interface can be used to enter data into the database and facilitates an intuitive understanding of the nature of the relationships involved.
    Type: Grant
    Filed: April 3, 2001
    Date of Patent: December 28, 2004
    Assignee: Pika Technologies Inc.
    Inventor: Deborah L. Pinard
  • Patent number: 6834304
    Abstract: A method and system for auditing an optical network to identify malfunctioning network elements and to generate a report which would allow skilled personnel to quickly and effectively identify areas of functionality of a deployed network element that is operating incorrectly by reading through the report. The method involves reading a network element data file and comparing parameters of the file represented by a network interface command line of the file with specified parameters to determine if the network element is operating within valid operating ranges; determining which parameters of the network interface command line are outside valid operating ranges; creating a network element findings file for findings of parameters of the network interface command line which are outside valid operating ranges; and repeating the foregoing steps for data files of all network elements in the network.
    Type: Grant
    Filed: December 21, 2000
    Date of Patent: December 21, 2004
    Assignee: Nortel Networks Limited
    Inventors: Alan D. Nisbet, Andrew W. Leslie
  • Patent number: 6831493
    Abstract: A duty cycle regulator derives from an input clock of arbitrary duty cycle, an output clock having an adjustable duty cycle of similar frequency. The duty cycle regulator includes a bistable circuit for receiving an input clock pulse and providing the output clock, coupled through a feedback loop to an adjustable delay unit having a delay interval equal to an adjustable fraction of the input clock period. When an input clock pulse is received, the bistable circuit is set, providing a high signal to the delay unit, after which the delay interval resets the bistable circuit to provide a low signal. The delay unit includes two charge pumps alternately feeding and draining electric charges into and from a low-pass filter. The delay interval can be adjusted to a desired duty cycle independent of the input clock frequency, by setting the ratio of electric currents through the two charge pumps.
    Type: Grant
    Filed: March 7, 2003
    Date of Patent: December 14, 2004
    Assignee: Mosaid Technologies Incorporated
    Inventor: Stanley Jeh-Chun Ma
  • Patent number: 6825778
    Abstract: A variable speed limit work zone safety system is provided herein. It includes at least two spaced-apart stations. Each station includes a plurality of sensors to gather information relative to at least one of traffic flow and road conditions. The station includes a controller which is programmed to analyse data which is received from the sensors and to derive, therefrom, an optimum speed limit at a selected location adjacent to, or in, the work zone. The station further includes a communication sub-system to communicate data related to the optimum speed limit to a message board to display the optimum speed to motorists.
    Type: Grant
    Filed: October 21, 2002
    Date of Patent: November 30, 2004
    Assignee: International Road Dynamics Inc.
    Inventors: Terry Bergan, Robert Bushman
  • Patent number: 6801201
    Abstract: A method for generating markup information and annotating a time series chart to display recognized pattern formations. Pivot points in the time series are identified and categorized. The pivot points are then analyzed to recognize desired pattern formations. The time series is then graphically displayed with the pivot points marked and labeled. Lines drawn between the pivot points display the recognized pattern to a user. Breakout (trend) lines can also be included. The time series can include time series of financial data, such as stock prices, medical data, such as electrocardiogram results, or any other data that can be presented as a time series, and in which it is desirable to identify turning points, trends, formations or other information.
    Type: Grant
    Filed: December 17, 2002
    Date of Patent: October 5, 2004
    Assignee: Recognia Incorporated
    Inventor: Richard E.A. Escher
  • Patent number: 6780000
    Abstract: Apparatus is provided herein for making a plurality of spherical products, e.g., meat balls. The apparatus includes a base. A tray support platform is mounted on the base for tethered buffetted motion with respect to the base. A tray having an upper non-stick surface is mounting on, and is held to, the tray support platform. A grid consisting of an array of compartments constituted by a plurality of intersecting walls and having an open bottom is supported on the tray.
    Type: Grant
    Filed: April 10, 2001
    Date of Patent: August 24, 2004
    Inventor: Peter Huszcz
  • Patent number: 6778822
    Abstract: A method and system for detecting and processing armed triggers associated with specific call functions in an intelligent network, using a distributed intelligent network triggering architecture. The complex trigger profile is removed from call processing at the service switching point to a trigger processing server, so that a much simplified and reduced profile can be sent to the service switching point associated with a roaming subscriber, which overcomes the problem of lack of support for long messages within the signalling infrastructure, and the problems associated with wide variation in the capabilities of service switching points. The reduced processing at the service switching point means that the detection points for armed triggers residing therein need only have a minimal triggering capability and a generic trigger for each detection point, and therefore do not need to be upgraded as new triggers are defined or as new criteria are defined for existing triggers at a given detection point.
    Type: Grant
    Filed: October 4, 2000
    Date of Patent: August 17, 2004
    Assignee: Nortel Networks Limited
    Inventors: John Visser, James A. Hodges, Jackson Y. K. Chan
  • Patent number: 6776121
    Abstract: The freezeless method for watering livestock, in one embodiment, is a method and means to provide water to livestock using a well, trough and a piston pump that is activated and powered by the animal. The animal uses its nose to push a plate on a lever apparatus that is attached to the pump. The pushing motion causes a rod to move the piston pump, which in turn raises water to the surface via piping into the trough where the animal drinks the water. The animal continues to pump the lever apparatus until the desired amount of water is consumed. By using a drain means and insulation means, the apparatus operates in freezing temperatures without the use of a power or heat source.
    Type: Grant
    Filed: August 29, 2002
    Date of Patent: August 17, 2004
    Inventor: James H. Anderson
  • Patent number: 6744688
    Abstract: A system and method for reduction of power consumed by a searchline buffer and control circuit during a CAM search-and-compare operation. The data buffer circuit samples one bit of a search word and a mask bit for driving a pair of complementary searchlines with the appropriate logic levels. The complementary searchlines are precharged to a mid-point voltage level between the high logic level voltage and the low logic level voltage during a precharge phase. The mid-point voltage level is applied on each searchline by sharing charge from the searchline at the high logic level voltage with the searchline at the low logic level voltage. Additional control logic compares the searchline data of the current search-and-compare operation with the next search-and-compare operation, to inhibit searchline precharging when both searchline data are at the same logic level.
    Type: Grant
    Filed: February 4, 2003
    Date of Patent: June 1, 2004
    Assignee: MOSAID Technologies Incorporated
    Inventors: Peter B. Gillingham, Abdullah Ahmed
  • Patent number: 6717876
    Abstract: A matchline sense circuit for detecting a current on a matchline of a CAM array is disclosed. Matchlines are decoupled from the sense circuit sense node in order to achieve higher sensing speed and improved sense margins. More specifically, a matchline sense circuit sense node receives a reference current, which is high enough to maintain the sense node at the high logic level. This reference current is generated from a dummy pull-down path identical to a memory cell pull-down path to ensure that the reference current tracks with changes to the memory cell current. Matchlines initially at ground potential undergo accelerated precharge up to a preset voltage potential level below VDD to overcome tail-out parasitic current and to minimize the voltage swing of the matchlines for conserving power. During sensing, the matchline current is compared to the reference current, and a latch circuit connected to the sense node provides a full CMOS output signal indicating the result of the comparison.
    Type: Grant
    Filed: December 27, 2002
    Date of Patent: April 6, 2004
    Assignee: Mosaid Technologies Incorporated
    Inventors: Peter Vlasenko, Douglas Perry
  • Patent number: 6711155
    Abstract: A distributed PBX, KSU and the like system has at least one time domain multiplexed (TDM) switch unit interfaced with transparent wideband channels such as Ethernet by means of at least one Public Switched Telephone Network (PSTN) interface unit and at least one service module (SM) interconnecting it to remote station terminals. One or more applications servers may be located where available or convenient and interact with the TDM switch unit by means of IP addressable path or paths.
    Type: Grant
    Filed: December 29, 1999
    Date of Patent: March 23, 2004
    Assignee: Nortel Networks Limited
    Inventors: Lee C. Himbeault, Steven J. Rhodes, Ronald G. Wellard, Paul A. Senyshyn
  • Patent number: 6711396
    Abstract: A method and system for reducing local oscillator leakage from radio frequency mixers is disclosed. Compensating circuits are used to reduce or eliminate unwanted leakage from the mixer output signal by controlling the current in individual branches of a balanced input circuit of the mixer. The current is directly controlled by adjusting the voltage on the bases of the differential type amplifier input transistors, or by injecting current directly into the individual branches, or by extracting current directly from the individual branches. The current is also indirectly controlled by increasing the temperature of the mixer components with power dissipation elements that are not connected to the mixer. The compensating circuits are made of different combinations of resistor, transistor and current sink components.
    Type: Grant
    Filed: November 13, 2000
    Date of Patent: March 23, 2004
    Assignee: Nortel Networks Limited
    Inventors: Adrian J. Bergsma, Ronald Douglas Beards, John Jackson Nisbet, Theodore Gregory Carron
  • Patent number: 6693814
    Abstract: A system and method for high speed generation of a global address corresponding to the highest priority active matchline sense output signal received after a CAM search-and-compare operation is disclosed. A priority encoder having blocks of multiple match resolver circuits arranged in a logical order of priority receives a plurality of active matchline sense output signals. Each block of multiple match resolver circuits generates a flag signal and a local address corresponding to the highest priority active matchline sense output signal received. Control logic receives flag signals from the multiple match resolver circuits, and identifies the highest priority multiple match resolver circuit that has received an active matchline sense output signal. The control logic then disables all lower priority multiple match resolver circuits such that only the local address generated by the highest priority multiple match resolver circuit is passed by the priority encoder.
    Type: Grant
    Filed: September 18, 2001
    Date of Patent: February 17, 2004
    Assignee: Mosaid Technologies Incorporated
    Inventors: Robert McKenzie, Valerie L. Lines
  • Patent number: 6687146
    Abstract: A high-density folded bitline memory array architecture is disclosed. High memory cell packing density is achieved by dividing polysilicon wordlines into short individual segments in the folded bitline scheme. Each wordline segment forms the gate of one or two DRAM memory cell transistors, and each segment is connected to a metal wordline, or conductor having low resistivity. By eliminating spaces between the memory cells due to passing wordlines, a cell arrangement and density similar to open bitline schemes is achieved. Further packing is obtained by arranging two columns of memory cells parallel to each bitline, each column offset with the other by a predetermined pitch. Therefore, by increasing the number of memory cells connected to each complementary bitline pair, each bitline pair can be cut in half and connected to its own bitline sense amplifier to reduce the bitline capacitance.
    Type: Grant
    Filed: January 31, 2002
    Date of Patent: February 3, 2004
    Assignee: Atmos Corporation
    Inventors: Wlodek Kurjanowicz, David Chi Wing Kwok
  • Patent number: 6667924
    Abstract: A signal detection circuit that provides multilevel sense detection that is both fast and has low power consumption. The signal detection circuit has amplifying means for providing at least one output corresponding to the difference in voltage levels between a sense node and a reference node. Input means apply a voltage level onto the sense node, and reference means apply a reference voltage onto the reference node. The input and reference means have substantially similar electrical characteristics, however, the reference means includes a reference device that is physically larger than a corresponding device of the input means.
    Type: Grant
    Filed: December 10, 2002
    Date of Patent: December 23, 2003
    Assignee: Mosaid Technologies Incorporated
    Inventors: Abdullah Ahmed, Valerie L. Lines
  • Patent number: 6665220
    Abstract: A system for adding redundancy to the data path of a content addressable memory array is disclosed herein. The disclosed system employs an array of memory elements, supplemented by an array of redundant memory elements, with a switching system and a redundancy control system to ensure that defective memory elements are not accessed. Additionally a pull down unit is employed on the search lines of non-operative memory elements to ensure that inaccurate search results are not reported.
    Type: Grant
    Filed: June 18, 2002
    Date of Patent: December 16, 2003
    Assignee: Mosaid Technologies Incorporated
    Inventor: Peter Vlasenko
  • Patent number: 6572311
    Abstract: Two-piece drill bits and methods of manufacturing same provide a preferably hexagonal shank, and a drill portion having a proximal end inserted into an axial hole in a distal end of the shank. In a preferred embodiment, at least part of the area adjacent the proximal end of the drill portion is knurled. Alternative embodiments have wings, polygons, tapers or other irregular shapes, or combinations of same. A variety of means may be employed to mechanically capture the drill portion in the shank.
    Type: Grant
    Filed: July 24, 2001
    Date of Patent: June 3, 2003
    Assignee: Maxtech Manufacturing Inc.
    Inventor: Kailash C. Vasudeva
  • Patent number: 6566925
    Abstract: A duty-cycle regulation method for deriving an output clock signal having a predetermined duty cycle from an input clock signal having an arbitrary duty cycle. Once the input clock signal is received, an output clock storage element is switched to a first state upon detecting a transition in the input clock signal for driving the output clock signal to a first signal level. The output clock storage element is then switched to a second state after a delay interval equal to a fraction of the period for driving the output clock signal to a second signal level. The fraction of the period can be programmed to a pre-selected value.
    Type: Grant
    Filed: October 18, 2001
    Date of Patent: May 20, 2003
    Assignee: Mosaid Technologies Incorporated
    Inventor: Stanley Jeh-Chun Ma
  • Patent number: 6547614
    Abstract: A personal flotation device (PFD) with flotation foam is disclosed. A soft PFD, or a life jacket, is made up of a number of individual pockets in which flotation foam is enclosed to provide buoyancy. An additional layer of soft foam is fastened between the flotation foam and the material forming one side of each individual pocket to create a rounded edge that covers the harder edges of the flotation foam that cause user discomfort. To manufacture the soft PFD, two layers of material are first fastened to each other at their edges to form at least one open pocket. A soft foam layer is fastened by its edges to the exterior of one or both of the material layers, or simultaneously as the two material layers are fastened together. The open pocket is subsequently turned inside out to form an inverted pocket. This causes the material layer with the fastened soft foam layer to round out. Flotation foam is then inserted into the inverted pocket, which is subsequently closed.
    Type: Grant
    Filed: October 9, 2001
    Date of Patent: April 15, 2003
    Assignee: Salus Marine Wear Inc.
    Inventor: Steven G. Wagner
  • Patent number: D474023
    Type: Grant
    Filed: July 9, 2002
    Date of Patent: May 6, 2003
    Assignee: Maxtech Manufacturing Inc.
    Inventor: Kailash C. Vasudeva