Abstract: An IC chip 10 is divided into the analog circuit area 1 and a digital circuit area 2 in its layout. A clock generator circuit 6 that generates a clock signal CK is arranged within the digital circuit area 2, and a switching circuit 4 that performs switching operations by the clock signal CK is also arranged within the digital circuit area 2. This enables shortening of the wiring length of the clock line 9, which is routed from the clock generator circuit 6 to the switching circuit 4, and also enables the distance between the clock line 9 and the analog circuits within the analog circuit area 1 to be as great as possible. Through this, inconvenience where digital noise caused by the clock signal flowing through the clock line 9 jumps into analog circuits can be suppressed.

Abstract: A power amplifier has a pair of FETs of opposite kinds connected together to form a source/drain circuit connected with an output. A second pair of high speed transistors is connected to the input and forms a collector/emitter circuit connected to the gates of the FETs. Capacitors are connected across the second pair of transistors and the pair of FETs respectively. Opposing current sources connect with the bases of the second pair of transistors via a resistor divider.

Abstract: A structure having a p-n junction in a semiconductor having a first p-type region and a first n-type region along with a region located in the vicinity of the p-n junction that is doped with a rare-earth element. In addition, the structure includes a charge source coupled to one of the p-type region and n-type region for providing charge carriers to excite atoms of the rare-earth element. Also provided is a method for producing the structure that includes providing a bipolar junction transistor; doping a region in a collector of the transistor with a rare-earth element; and biasing the transistor to generate light emission from the rare-earth element doped region.

Abstract: Overvoltage-protection device, applicable in particular to the low-voltage mains, comprising, between the two lines (1, 2) of the mains, a gas-discharge arrestor (3), a varistor (4) and a thermal-fuse element (5) task with ensuring the thermal disconnection of the device . It includes, in parallel with the varistor (4), a resistor (7) causing, after the short-circuiting of the gas-discharge arrestor (3), the heating of the thermal-fuse element (5) so as to trigger the thermal disconnection of the device.

Abstract: A method of ensuring against deterioration of an underlying silicide layer over which a refractory material layer is deposited by physical vapor deposition (PVD) or chemical vapor deposition (CVD) is realized by first providing a continuous polysilicon layer prior to the refractory material deposition. The continuous polysilicon layer, preferably no thicker than 50 Å, serves a sacrificial purpose and prevents interaction between any fluorine that is released during the refractory material deposition step from interacting with the underlying silicide.

Abstract: An amplifier circuit for AM broadcasting for amplifying an inputted AM broadcast signal by an FET and outputting it. The amplifier circuit comprises FETs for signal amplification which are P-channel MOSFETs (4, 5) of relatively small flicker noise. While suppressing the flicker noise to a lowest possible level, more circuits including the RF amplifier for AM broadcasting can be integrated on one chip, thereby realizing small size and low noise of the circuits.

Abstract: A structure for testing external connections to semiconductor devices. The structure includes an external electrical path between selected external connections on the semiconductor devices.