Abstract: A bipolar-CMOS static random access memory device includes a plurality of static random access memory cells arranged in columns and rows, complementary pairs of bit lines coupled to the cells in each row, word lines coupled to the cells in each row of the cells and a plurality of sense amplifiers with a separate sense amplifier coupled to each pair of the complementary bit lines. The memory device further includes bipolar pull-up transistors for each of the bit lines, with the collectors of the pull-up transistors coupled to a power supply node and the emitters coupled to the bit lines. Circuitry is provided which biases the bases of the pull-up transistors so that the pull-up transistors are on during a read operation, and so that the pull-up transistor associated with the low side bit line during a write operation is turned off. In addition, the pull-up transistors for both bit lines are biased to the on-state in a write operation for those columns which are not selected.