Abstract: Presented are one or more aspects and/or one or more embodiments of catalysts, methods of preparation of catalyst, methods of deoxygenation, and methods of fuel production.

Abstract: Apparatuses for installing a wood floor at a job site. The apparatuses are configured as start courses, finish courses, or border courses for the wood floor. In one embodiment, the courses comprise hardwood tongue and groove strips or hardwood tongue and groove planks fastened together prior to installation in the floor. A preferred embodiment uses adhesive lamination of the tongue and groove of adjacent boards such as strips and planks. A method of installing a hardwood floor includes the step of using at least one start course, at least one finish course, or at least one border course as disclosed in this application. A hardwood floor according to one embodiment of the present invention includes at least one start course, at least one finish course, or at least one border course as disclosed in this application.

Abstract: Presented are methods of fabricating three-dimensional integrated circuits that include post-contact back end of line through-hole via integration for the three-dimensional integrated circuits. Another aspect of the present invention includes three-dimensional integrated circuits fabricated according to methods of the present invention.

Abstract: This invention pertains to methods and systems for fabricating semiconductor devices. One aspect of the present invention is a method of depositing a gapfill copper layer onto a barrier layer for semiconductor device metallization. In one embodiment, the method includes forming the barrier layer on a surface of a substrate and subjecting the barrier layer to a process condition so as to form a removable passivated surface on the barrier layer. The method further includes removing the passivated surface from the barrier layer and depositing the gapfill copper layer onto the barrier layer. Another aspect of the present invention is an integrated system for depositing a copper layer onto a barrier layer for semiconductor device metallization.

Abstract: An integrated process for forming metallization layers for electronic devices that use damascene structures that include low-k dielectric and metal. According to one embodiment of the present invention, the integrated process includes planarizing a gapfill metal in low-k dielectric structures, generating a protective layer on the low-k dielectric followed by cleaning the surface of the gapfill metal. Another embodiment of the present invention includes a method of protecting low-k dielectrics such as carbon doped silicon oxide.

Abstract: The present invention relates to methods and structures for the metallization of semiconductor devices. One aspect of the present invention is a method of forming a semiconductor device having copper metallization. In one embodiment, the method includes providing a patterned wafer having a diffusion barrier for copper; depositing a copperless seed layer on the diffusion barrier effective for electrochemical deposition of gapfill copper. The seed layer is formed by a conformal deposition process and by a nonconformal deposition process. The method further includes electroplating copper gapfill onto the seed layer. Another aspect of the invention includes electronic devices made using methods and structures according to embodiments of the present invention.

Abstract: The present invention relates to methods and systems for the metallization of semiconductor devices. One aspect of the present invention is a method of depositing a copper layer onto a barrier layer so as to produce a substantially oxygen free interface therebetween. In one embodiment, the method includes providing a substantially oxide free surface of the barrier layer. The method also includes depositing an amount of atomic layer deposition (ALD) copper on the oxide free surface of the barrier layer effective to prevent oxidation of the barrier layer. The method further includes depositing a gapfill copper layer over the ALD copper. Another aspect of the present invention is a system for depositing a copper layer onto barrier layer so as to produce a substantially oxygen-free interface therebetween. In one embodiment, the integrated system includes at least one barrier deposition module. The system also includes an ALD copper deposition module configured to deposit copper by atomic layer deposition.

Abstract: The present invention pertains to methods, apparatuses, and systems for fabricating three-dimensional integrated circuits. One embodiment of the method comprises providing a wafer or other substrate having a plurality of through holes. In addition, the method includes supporting the wafer or other substrate with a wafer or other substrate holder mounted in a process chamber. The method further includes generating a pressure differential between the front side of the wafer or other substrate and the back side of the wafer or other substrate while the wafer or other substrate is supported on the wafer or other substrate holder so that the pressure differential causes fluid flow through the through holes. Also, the method includes establishing process conditions in the process chamber for at least one process to fabricate integrated circuits. Embodiments of a system and embodiments of an apparatus according to the present invention are also presented.

Abstract: The present invention relates to methods and systems for the metallization of semiconductor devices. One aspect of the present invention is a method of depositing a copper layer onto a barrier layer so as to produce a substantially oxygen free interface therebetween. In one embodiment, the method includes providing a substantially oxide free surface of the barrier layer. The method also includes depositing an amount of atomic layer deposition (ALD) copper on the oxide free surface of the barrier layer effective to prevent oxidation of the barrier layer. The method further includes depositing a gapfill copper layer over the ALD copper. Another aspect of the present invention is a system for depositing a copper layer onto barrier layer so as to produce a substantially oxygen-free interface therebetween. In one embodiment, the integrated system includes at least one barrier deposition module. The system also includes an ALD copper deposition module configured to deposit copper by atomic layer deposition.

Abstract: Presented are methods of fabricating three-dimensional integrated circuits that include post-contact back end of line through-hole via integration for the three-dimensional integrated circuits. In one embodiment, the method comprises forming metal plug contacts through a hard mask and a premetal dielectric to transistors in the semiconductor. The method also includes etching a hole for a through-hole via through the hard mask to the semiconductor using a patterned photoresist process, removing the patterned photoresist and using a hard mask process to etch the hole to an amount into the semiconductor. The method further includes depositing a dielectric liner to isolate the hole from the semiconductor, depositing a gapfill metal to fill the hole, and planarizing the surface of the substrate to the hard mask. Another aspect of the present invention includes three-dimensional integrated circuits fabricated according to methods of the present invention.

Abstract: This invention pertains to methods and systems for fabricating semiconductor devices. One aspect of the present invention is a method of depositing a gapfill copper layer onto barrier layer for semiconductor device metallization. In one embodiment, the method includes forming the barrier layer on a surface of a substrate and subjecting the barrier layer to a process condition so as to form a removable passivated surface on the barrier layer. The method further includes removing the passivated surface from the barrier layer and depositing the gapfill copper layer onto the barrier layer. Another aspect of the present invention is an integrated system for depositing a copper layer onto a barrier layer for semiconductor device metallization.

Abstract: This invention seeks to provide methods and apparatus that can improve the accuracy of measured parameter data used for processing workpieces. One aspect of the present invention includes methods of measuring process conditions with low distortion of the measurements caused by the measuring apparatus. The measurements include data for applications such as data for monitoring, controlling, and optimizing processes and process tools. Another aspect of the present invention includes apparatus for measuring substantially correct data for applications such as generating data for monitoring, controlling, and optimizing processes and process tools.

Abstract: Presented are methods, systems, and apparatuses for managing and maintaining an electronic device such as a sensor apparatus.

Abstract: Computer program products, methods, systems, and apparatus for fingerprinting and process matching process tools such as process tools used for processing workpieces are described. One embodiment includes a method to determine process matching of one or more process tools using a first data set and a second data set. The first data set and the second data set include an operating characteristic for a process. The method comprises fingerprinting the one or more process tools using the first data set and the second data set; finding correspondences between transition points in the first data set and the second data set; and comparing the first data set and second data set using the correspondences to determine whether the first data set and the second data set match so as to indicate whether the one or more process tools match.

Abstract: Data are collected for deriving response models and information required for developing and maintaining processes and process tools. Methods and apparatus for collecting the data include a process tolerant sensor apparatus capable of collecting data with less perturbation and fewer disruptions than is usually possible using standard methods.

Abstract: Pads and methods of making the pads for applications such as polishing substrates and chemical mechanical planarization of substrates are provided. The pads include a substantially smooth surface for improved performance.

Abstract: This is an improved method of building with fibrous material though other materials can be substituted. A binding secures fibrous material to form a wall assembly (10). Wall surfacing (20) can be included in the binding and forming process, reducing the labor required to apply it. Other building features and components can also be included in the binding and forming process such as electrical wiring, furring strips, windows, doors and structural reinforcing. This method vastly reduces the difficulties encountered when installing these components. The versatility of the method also allows for attributes such as flat wall surfaces and variable wall thicknesses, which are difficult to achieve using baled fiber.

Abstract: Presented are methods and apparatus for controlling the processing of a substrate during a process step that is sensitive to one or more process conditions. One embodiment includes a method performed with corresponding apparatus that includes a controller. One step includes constructing a perturbation model relating changes in control parameters for the apparatus to one or more resulting changes in the process. The method also includes the step of using the perturbation model with at least one of a performance objective and a constraint to derive optimized control parameters for the controller. Another step in the method includes operating the controller with the optimized control parameters. Another embodiment includes an apparatus for processing substrates where the apparatus comprises optimized control parameters.

Abstract: Described are methods and apparatus for a security system. In one embodiment, the system includes capabilities to aid in locating an item that is being monitored when the item's location is unknown. The embodiment also includes capabilities for sounding an alarm when the item is believed to be missing.